View SC4612_9072149.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 www.semtech.com SC4612 wide input range high performance synchronous buck switching controller power management description features applications typical application circuit ? wide voltage range, v dd = 28v, v pwrin = 40v ? internally regulated drv ? output voltage as low as 0.5v ? 1.7a gate drive capability ? asynchronous start up mode ? low side r ds-on sensing with hiccup mode current limit ? programmable current limit ? programmable frequency up to 1.2 mhz ? available in mlpd-12 and soic-14 lead-free packages. this product is fully weee and rohs compliant SC4612 is a high performance synchronous buck controller that can be configured for a wide range of applications. the SC4612 utilizes synchronous rectified buck topology where high efficiency is the primary consideration. SC4612 is optimized for applications requiring wide input supply range and low output voltages down to 500mv. SC4612 implements an asynchronous soft-start mode, which keeps the lower side mosfet off during soft-start, a desired feature when a converter turns on into a preset external voltage or pre-biased output voltage. with the lower mosfet off, the external bus is not discharged, preventing any disturbances in the start up slope and any latch-up of modern day asic circuits. SC4612 comes with a rich set of features such as regulated drv supply, programmable soft-start, high current gate drivers, internal bootstrapping for driving high side n-channel mosfet, shoot through protection, r ds-on sensing with hiccup over current protection, and asynchronous start up with over current protection. ? distributed power architectures ? telecommunication equipment ? servers/work stations ? mixed signal applications ? base station power management ? point of use low voltage high current applications revision: january 31, 2007 q1 q2 l1 c8 c10 + _ + _ vin vout r3 r4 c5 r1 c1 c9 c2 r5 c3 d1 c7 c4 r2 r6 c6 ilim 1 phase 12 osc 2 ss/en 3 fb 5 vdd 6 gnd 7 dl 8 drv 9 bst 10 dh 11 eao 4 u1 SC4612mlp
2 ? 2007 semtech corp. www.semtech.com SC4612 power management absolute maximum ratings all voltages with respect to gnd. positive currents are into, and negative currents are out of the specified terminal. pulsed is defined as a less than 10% duty cycle with a maximum duration of 500ns. consult packaging section of data sheet for thermal limitations and considerations of packages. exceeding the specifications below may result in permanent damage to the device, or device malfunction. operation outside of th e parameters specified in the electrical characteristics section is not implied. note: (1). 1 sq. inch of fr-4, double-sided, 1 oz copper weight. r e t e m a r a pl o b m y sm u m i x a ms t i n u d n g o t e g a t l o v y l p p u s s a i bd d v0 3 o t 3 . 0 -v d n g o t v r d 0 1 o t 3 . 0 -v ) k a e p ( t n e r r u c e c r u o s v r d 0 0 1a m d n g o t , m i l i 0 1 o t 3 . 0 -v d n g o t c s o , b f , n e / s s , o a e 5 + o t 3 . 0 -v d n g o t l d 0 1 + o t 3 . 0 -v e s a h p o t t s b 0 1 + o t 3 . 0 -v d n g o t e s a h pn i v0 4 + o t 2 -v e s a h p o t h d 0 1 + o t 3 . 0 -v ) d p l m ( t n e i b m a o t n o i t c n u j e c n a t s i s e r l a m r e h t ) 1 ( a j 3 . 5 4w / c ) d p l m ( e s a c o t n o i t c n u j e c n a t s i s e r l a m r e h t c j 1 1w / c ) c i o s ( t n e i b m a o t n o i t c n u j e c n a t s i s e r l a m r e h t a j 5 1 1w / c ) c i o s ( e s a c o t n o i t c n u j e c n a t s i s e r l a m r e h t c j 5 4w / c e g n a r e r u t a r e p m e t n o i t c n u j g n i t a r e p ot j 5 2 1 + o t 0 4 -c e g n a r e r u t a r e p m e t e g a r o t st g t s 0 5 1 + o t 5 6 -c ) s 0 4 - 0 1 ( e r u t a r e p m e t w o l f e r r i k a e pt w o l f e r r i 0 6 2c ) 4 1 - c i o s ( , ) s 0 1 ( e r u t a r e p m e t d a e lt d a e l 0 0 3c ) l e d o m y d o b n a m u h ( g n i t a r d s ed s e2v k
3 ? 2007 semtech corp. www.semtech.com SC4612 power management vin = vdd = 12v, f osc = 600khz, t a = t j = -40 c to 125 c. unless otherwise specified: r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a ms t i n u y l p p u s s a i b d d v 8 2v t n e r r u c t n e c s e i u qv d d 0 = n e / s s , d a o l o n , v 8 2 = 57 a m t u o k c o l e g a t l o v r e d n u d d v d l o h s e r h t t r a t s 0 2 . 40 5 . 45 7 . 4v s i s e r e t s y h o l v u 0 0 4v m r o t a l u g e r e v i r d v r dv 0 1 v d d i , v 8 2 t u o a m 1 3 . 78 . 73 . 8v n o i t a l u g e r d a o la m 1 i o a m 0 0 1 0 0 1v m r o t a l l i c s o e g n a r y c n e u q e r f n o i t a r e p o 0 0 10 0 2 1z h k y c a r u c c a l a i t i n i ) 1 ( c c s o ) y l n o f e r ( f p 0 6 1 = 0 4 50 0 60 6 6z h k e l c y c y t u d m u m i x a m ) 2 ( 5 8% y e l l a v o t k a e p p m a r ) 1 ( 0 5 8v m t n e r r u c e g r a h c r o t a l l i c s o 0 90 1 1a ) n o s d r e d i s w o l ( t i m i l t n e r r u c e g a t l o v d l o h s e r h t t i m i l t n e r r u cv t u o v 5 , v 3 . 3 , v m 0 0 5 =0 0 1v m r e i f i l p m a r o r r e e g a t l o v k c a b d e e ft j c 0 7 + o t 0 =5 9 4 . 00 0 5 . 05 0 5 . 0v t j c 5 8 + o t 0 4 - =2 9 4 . 00 0 5 . 08 0 5 . 0v t j c 5 2 1 + o t 0 4 - =8 8 4 . 00 0 5 . 02 1 5 . 0v t n e r r u c s a i b t u p n iv 5 . 0 = b f0 0 2a n n i a g p o o l n e p o ) 1 ( 0 6b d h t d i w d n a b n i a g y t i n u ) 1 ( 70 1z h m t n e r r u c k n i s t u p t u ov 0 = b f , p o o l n e p o0 0 9a t n e r r u c e c r u o s t u p t u ov 6 . 0 = b f , p o o l n e p o0 0 1 1a e t a r w e l s ) 1 ( 1s / v electrical characteristics
4 ? 2007 semtech corp. www.semtech.com SC4612 power management r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a ms t i n u n e / s s e g a t l o v d l o h s e r h t e l b a s i d 0 0 5v m t n e r r u c e g r a h c t r a t s t f o s 5 2a t n e r r u c e g r a h c s i d t r a t s t f o s ) 1 ( 1a n w o d t u h s o t w o l e l b a s i d ) 1 ( 0 5s n p u c c i h e l c y c y t u d p u c c i h c s s , 1 . 0 = n o i t i d n o c t i m i l t n e r r u c 1% e v i r d e t a g ) h ( e c n a t s i s e r - n o e v i r d e t a g ) 2 ( i e c r u o s a m 0 0 1 =34 ? ) l ( e c n a t s i s e r - n o e v i r d e t a g ) 2 ( i k n i s a m 0 0 1 =34 ? t n e r r u c k a e p k n i s / e c r u o s l d ) 2 ( f p 0 0 0 2 = t u o c4 . 1 7 . 1a t n e r r u c k a e p k n i s / e c r u o s h d ) 2 ( f p 0 0 0 2 = t u o c4 . 1 7 . 1a e m i t e s i r t u p t u of p 0 0 0 2 = t u o c0 2s n e m i t l l a f t u p t u of p 0 0 0 2 = t u o c0 2s n p a l r e v o - n o n m u m i n i m ) 1 ( 0 3s n e m i t n o m u m i n i m ) 2 ( 0 1 1s n electrical characteristics (cont.) unless otherwise specified: notes: (1) guaranteed by design. (2) guaranteed by characterization. vin = vdd = 12v, f osc = 600khz, t a = t j = -40 c to 125 c.
5 ? 2007 semtech corp. www.semtech.com SC4612 power management timing diagrams ss/en 2.75v eao dh dl soft start duration asynchronous operation 0.5v 0.8v 1.3v vcc vcc uvlo 4.58v no fault start up sequence ss/en 2.75v eao dh dl 0.5v 0.8v 1.3v vcc vcc uvlo 4.58v over current fault at asynchronous start up sequence fault occur eoa 6 ? 2007 semtech corp. www.semtech.com SC4612 power management r e b m u n t r a p ) 3 ( e g a k c a p ) 2 ( t ( e g n a r . p m e t j ) t r t l m 2 1 6 4 c s2 1 - d p l m c 5 2 1 + o t c 0 4 - t r t s 2 1 6 4 c s4 1 - c i o s b v e 2 1 6 4 c s ) 1 ( d r a o b n o i t a u l a v e pin configurations ordering information notes: (1) when ordering please specify mlpd or soic package. (2) only available in tape and reel packaging. a reel contains 3000 devices for mlpd package and 2500 for soic package.. (3) lead-free product. this product is fully weee and rohs compliant. 1 2 3 4 5 6 7 phase ilim top view (12 pin mlpd) 12 8 dh osc bst ss/en drv eao dl fb gnd vdd 10 9 11 top mark marking information - mlpd nnnn = part number (example: 1531) yyww = date code (example: 0012) xxxxx = semtech lot no. (example:e9010) 4612 yyww xxxxx 1 2 3 4 5 6 7 phase nc top view (14 pin soic) 13 12 14 11 10 dh ilim bst osc drv ss/en dl eao gnd vdd fb nc 9 8 SC4612 yyww xxxxxxxxx nnnnnn = part number (example: SC4612) yyww = date code (example: 0552) xxxxxxxxx = semtech lot no. (example: a01e90101) top mark marking information - soic
7 ? 2007 semtech corp. www.semtech.com SC4612 power management pin descriptions # n i p d p l m # n i p c i o s e m a n n i pn o i t c n u f n i p 7 , 1c n. n o i t c e n n o c o n 12 m i l i t n e r r u c l a n r e t n i n a h t i w n o i t c n u j n o c n i ) 3 r & 2 r ( s r o t s i s e r g n i m a r g o r p t i m i l t n e r r u c e h t n o - s d r t e f s o m e d i s w o l e h t r o f d l o h s e r h t t i m i l t n e r r u c e h t m a r g o r p , e c r u o s p o r d e h t n a h t r e g r a l s i t e f s o m e d i s w o l e h t s s o r c a p o r d e g a t l o v e h t e c n o . g n i s n e s t i m i l t n e r r u c p u c c i h e h t d n a , s r u c c o n o i t i d n o c t i m i l t n e r r u c , e u l a v d e m m a r g o r p e h t s s o r c a . d e t a v i t c a s i n o i t c e t o r p 23 c s o r o t a l l i c s o e h t m a r g o r p l l i w d n g o t r o t i c a p a c l a n r e t x e n a . n i p t e s y c n e u q e r f r o t a l l i c s o c . s v y c n e u q e r f " e l b a t e e s . y c n e u q e r f c s o r o t a l l i c s o e n i m r e t e d o t 4 1 e g a p n o " . y c n e u q e r f 34 n e / s s l l i w r o t i c a p a c l a n r e t x e e l g n i s a o t d e t c e n n o c e c r u o s t n e r r u c l a n r e t n i . n i p t r a t s t f o s . n w o d d e l l u p f i p i h c e h t s t i b i h n i . t u p t u o e h t r o f n o i t a r u d t r a t s - t f o s e h t e n i m r e t e d 45 o a e . b f o t n i p s i h t m o r f d e t c e n n o c s i k r o w t e n n o i t a s n e p m o c a . t u p t u o r e i f i l p m a r o r r e 58 b f t u p t u o e h t e s n e s o t d e s u s i n i p k c a b d e e f . r e i f i l p m a r o r r e e h t f o t u p n i g n i t r e v n i e h t . r e d i v i d e v i t s i s e r a a i v e g a t l o v 66 d d v e s a b e h t e d i v o r p o t d e s u y l l a i t i n i s i n i p d d v , v 8 2 o t v 5 . 4 m o r f g n i g n a r y l p p u s s a i b . v r d e h t e t a l u g e r o t r o t s i s n a r t s s a p l a n r e t n i e h t o t e v i r d 79 d n g. d n u o r g 80 1l d. t e f s o m m o t t o b r o f e v i r d e t a g . ) w o l e v i r d ( l a n g i s l d 91 1v r d n i p s i h t . y r t i u c r i c g o l a n a p i h c e h t d n a , e v i r d e t a g s t e f s o m t u p t u o e h t s e i l p p u s v r d d e t a l u g e r y l l a n r e t n i s i v r d . d n g o t r o t i c a p a c c i m a r e c f 2 . 2 a h t i w d e s s a p y b e b d l u o h s e b d l u o c y l p p u s e h t , v 0 1 w o l e b s i d d v f i . d d v o t d e t c e n n o c y l p p u s l a n r e t x e e h t m o r f . n i p v r d e h t o t d e t c e n n o c y l t c e r i d 0 12 1t s b y l p p u s l a n r e t x e n a o t d e t c e n n o c y l t c e r i d e b n a c ; r e v i r d e d i s h g i h r o f y l p p u s . l a n g i s t s b . t i u c r i c p a r t s t o o b a o t r o 1 13 1h d. t e f s o m p o t r o f e v i r d e t a g . ) h g i h e v i r d ( l a n g i s h d 2 14 1e s a h p e s a h p e h t t a e g a t l o v e h t e s n e s o t d e s u o s l a , e v i r d e t a g e d i s h g i h e h t r o f h t a p n r u t e r e h t . g n i s n e s e g a t l o v n o - s d r e d i s - w o l e h t d n a , n o i t c e t o r p e v i r d e t a g e v i t p a d a r o f e d o n x- l a m r e h t ) d n g ( d a p . s a i v e l p i t l u m g n i s u e n a l p d n u o r g o t t c e n n o c . s e s o p r u p g n i k n i s t a e h r o f d a p ss ss ss i 2 . 1 x c t
8 ? 2007 semtech corp. www.semtech.com SC4612 power management block diagram ocp @ asynchronous start up eao > fb + 0.7 true false for more than 10 cycles allow synchronous mode soft start cycle pwm enable vcc uvlo ss + - 800mv pwm disable vcc uvlo + - over voltage protection s q r fb 600mv 20% ovp low side 100% on top side off pwm enable + - fb vref synchronous mode s q r pwm enable low side rdson ocp s q r pwm enable pwm disable + - ss vref+0.5 ref internal regulator & bandgap generator vdd drv gnd oscillator 900mv osc current limit ilim soft start & enable ss/en top side gate driver bst dh phase pwm control low side gate driver vcc dl gnd bst dh phase dl + - error amp. fb ss fb + - en sync ocp synchronous mode pwm pwm eao ovp ocp ovp q s r ss
9 ? 2007 semtech corp. www.semtech.com SC4612 power management applications information introduction the SC4612 is a versatile voltage mode synchronous rectified buck pwm convertor, with an input supply (vin) ranging from 4.5v to 28v designed to control and drive n-channel mosfets. the power dissipation is controlled using a novel low volt- age supply technique, allowing high speed and integra- tion with the high drive currents to ensure low mosfet switching loss. the synchronous buck configuration also allows converter sinking current from load without losing output regulation. the internal reference is trimmed to 500mv with 1% accuracy, and the output voltage can be adjusted by two external resistors. a fixed oscillator frequency (up to 1.2mhz) can be programmed by an external capacitor for an optimized design. during the asynchronous start up, the SC4612 provides a top mosfet shut down over current protection, while under normal operating conditions a low side mosfet r ds-on current sensing with hiccup mode over current protection, minimizes power dissipation and provides further protection. other features of the SC4612 include: wide input power voltage range (from 4.5v to 28v), low output voltages down to 500mv, externally programmable soft-start, hiccup over current protection, wide duty cycle range, thermal shutdown, asynchronous start-up protection, and a -40 to 125c junction operating temperature range. theory of operation supplies two pins (vdd and drv) are used to power up the SC4612. if input supply (vdd) is less than 10v (max), tie drv and vdd together. this supply should be bypassed with a low esr 2.2uf (or greater) ceramic capacitor directly at the drv to gnd pins of the SC4612. the drv supply also provides the bias for the low and the high side mosfet gate drive. the maximum rating for drv supply is 10v and for applications where input supply is below 10v, it may be connected directly to vdd. start up sequence start up is inhibited until vdd input reaches its uvlo threshold. the uvlo limit is 4.5v (typ). meanwhile, the high side and low side gate drivers dh, and dl, are kept low. once vdd exceeds the uvlo threshold, the external soft-start capacitor starts to be charged by a 25a current source. if an over current condition occurs, the ss/en pin will discharge to 500mv by an internal switch. during this time, both dh and dl will be turned off. when the ss pin reaches 0.8v, the converter will start switching. the reference input of the error amplifier is ramped up with the soft-start signal. initially only the high side driver is enabled. keeping the low side mosfet off during start up is useful where multiple convertors are operating in parallel. it prevents forward conduction in the freewheeling mosfet which might otherwise cause a dip in the common output bus. in case of over current condition which is longer than 10 cycles during the asynchronous start up, SC4612 will turn off the high side mosfet gate drive, and the soft-start sequence will repeat. when the ss pin reaches 1.3v, the low side mosfet will begin to switch and the convertor is fully operational in the synchronous mode. the soft-start duration is controlled by the value of the ss cap. if the ss pin is pulled below 0.5v, the SC4612 is disabled and draws a typical quiescent current of 5ma. bias generation a 4.5v to 10v (max) supply voltage is required to power up the SC4612. this voltage could be provided by an ex- ternal power supply or derived from vdd (vdd >10v) through an internal pass transistor. the internal pass transistor will regulate the drv from an external supply >10v connected to vdd to produce 7.8v (typ) at the drv pin. soft start / shut down an external capacitor at the ss/en pin is used to set up the soft-start duration. the capacitor value in conjunction with the internal current source, controls the duration of soft-start time. if the ss/en pin is pulled down to gnd, the SC4612 is disabled. the soft-start pin is charged by a 25 a current source and discharged by an internal switch. when ss/en is released it charges up to 0.5v as the con- trol circuit starts up.
10 ? 2007 semtech corp. www.semtech.com SC4612 power management applications information (cont.) the reference input of the error amplifier is effectively ramped up with the soft-start signal. the error amp output will vary between 100mv and 1.2v, depending on the duty cycle. the error amp will be off until ss/en reaches 0.7v (typ) and will move the output up to its desired voltage by the time ss/en reaches 1.3v. the gate drivers will be in asynchronous mode until the fb pin reaches 500mv. the intention for the asynchronous start up is to keep the low side mosfet from being switched on which forces the low side mosfets body diode or the parallel schottky di- ode to conduct. the conduction by the diode prevents any dips in an existing output voltage that might be present, allowing for a glitch free start up in applications that are sensitive to any bus disturbances. during the asynchronous start up SC4612 monitors the output and if within 10 cycles the fb has not reached the internal soft start ramp level, the device switches to syn- chronous mode. this provides an added protection in case of short circuit at the output during the asynchronous start when the bottom mosfet is not being switched to provide the r ds-on sensing current limit protection. in case of a current limit, the gate drives will be held off until the soft-start is initiated. the soft-start cycle defined by the ss cap being charged from 800mv to 1.3v and slowly discharged to achieve an approximate hiccup duty cycle of 1% to minimize excessive power dissipation. the part will try to restart on the next softstart cycle. if the fault has cleared, the outputs will start . if the fault still remains, the part will repeat the soft-start cycle above in- definitely until the fault has been removed. the soft-start time is determined by the value of the softstart capacitor (see formula below). ss ss ss i 2 . 1 x c t oscillator frequency selection the internal oscillator sawtooth signal is generated by charging an external capacitor with a current source of 100 a charge current. see table 1 ?frequency vs. c osc ? on page 14 to determine oscillator frequency. overcurrent protection SC4612 features low side mosfet on-state rds current sensing and hiccup mode over current protection. ilim pin would be connected to drv or phase via programming resistors to adjust the over current trip point to meet different customer requirements. the sampling of the current thru the bottom fet is set at ~150ns after the bottom fet drive comes on. it is done to prevent a false tripping of the current limit circuit due to the ringing at the phase node when the top fet is turned off. internally overcurrent threshold is set to 100mv_typ. if voltage magnitude at the phase node during sampling is such that the current comparator meets this condition then the ocp occurs. connecting a resistor from external voltage source such as vdd, drv, etc. to ilim increases the current limit. connecting a resistor from ilim to phase lowers the current limit (see the block diagram in page 9). internal current source at ilim node is ~20a. external programming resistors add to or subtract from that source and hence vary the threshold. the tolerance of the collective current sink at ilim node is fairly loose when combined with variations of the fet?s rds(on). therefore when setting current limit some iteration might be required to get to the wanted trip point. nonetheless, this circuit does serve the purpose of a hard fault protection of the power switches. when choosing the current limit one should consider the cumulative effect of the load and inductor ripple current. as a rule of thumb, the limit should be set at least x10 greater then the pk-pk ripple current. whenever a high current peak is detected, SC4612 would first block the driving of the high side and low side mosfet, and then discharge the soft-start capacitor. discharge rate of the ss capacitor is 1/25 of the charge rate. under voltage lock out under voltage lock out (uvlo) circuitry senses the vdd through a voltage divider. if this signal falls below 4.5v (typi- cal) with a 400mv hysteresis (typical), the output drivers are disabled . during the thermal shutdown, the output drivers are disabled.
11 ? 2007 semtech corp. www.semtech.com SC4612 power management applications information (cont.) below are examples of calculating the ocp trip voltages. low side r ds_on current limit 1. ra, rb - not installed: 2 r vphase mv 100 3 r mv 100 v 75 . 2 ? = ? solving for: v phase = -100mv, therefore the circuit will trip @ r ds_on x i load = 100mv 2. to lower trip voltage - install rb. for example: rb = 13k ) 1 r rb ( || 2 r vphase mv 100 3 r mv 100 v 75 . 2 + ? = ? solving for: v phase = -20mv, obviously more sensitive! r ds_on x i load = 20mv 3. to increase trip voltage - install ra. for example: ra = 800k; v drive = 7.8v typ. 2 r vphase mv 100 1 r ra vdrive 3 r mv 100 v 75 . 2 ? = + + ? solving for: v phase = -200mv. current limit has doubled compared to original conditions. note! allow for tempco and r ds_on variation of the mosfet - see ?overcurrent protection? information on page 11 in the datasheet. phase pin 2.75v ocp SC4612 r5 10k r1 2k ra rb r4 260k r3 130k r2 10k c2 5pf c1 2pf ilim pin drv pin comp +100mv l r load vin iload@toff
12 ? 2007 semtech corp. www.semtech.com SC4612 power management where, v in ? input voltage r l ? load resistance l ? output inductance c ? output capacitance esr c ? output capacitor esr v s ? peak to peak ramp voltage the classical type iii compensation network can be built around the error amplifier as shown below: r3 c3 r2 r1 c1 vref c2 - + figure 1. voltage mode buck converter compensation network the transfer function of the compensation network is as follows: ) s 1 )( s 1 ( ) s 1 )( s 1 ( s ) s ( g 2 p 1 p 2 z 1 z i comp + + + + ? = where, cout lout 1 , c ) r r ( 1 , c r 1 o 2 3 1 2 z 1 2 1 z = + = = 3 1 3 1 2 2 p 2 3 1 p 3 1 1 i c c c c r 1 , c r 1 , ) c c ( r 1 + = = + = applications information (cont.) gate drive/control the SC4612 also provides integrated high current gate drives for fast switching of large mosfets. the high side and low side mosfet gates could be switched with a peak gate current of 1.7a. the higher gate current will reduce switching losses of the larger mosfets. the low side gate drives are supplied directly from the drv. the high side gate drives could be provided with the clas- sical bootstrapping technique from drv. cross conduction prevention circuitry ensures a non over- lapping (30ns typical) gate drive between the top and bot- tom mosfets. this prevents shoot through losses which provides higher efficiency. typical total minimum off time for the SC4612 is about 30ns which will cause the maxi- mum duty cycle at higher frequencies to be limited to lower than 100%. overvoltage protection if the fb pin ever exceeds 600mv, the top side driver is latched off, and the low side driver is latched on. this mode can only be reset by power supply cycling. error amplifier design the SC4612 is a voltage mode buck controller that utilizes an externally compensated high bandwidth error amplifier to regulate output voltage. the power stage of the synchronous rectified buck converter control-to-output transfer function is as shown below: ? ? ? ? ? ? ? ? ? ? ? ? ? ? + + + = lc 2 s l r l s 1 c c sesr 1 s v in v ) s ( vd g
13 ? 2007 semtech corp. www.semtech.com SC4612 power management the design guidelines are as following: 1. set the loop gain crossover frequency w c for given switching frequency. 2. place an integrator at the origin to increase dc and low frequency gains. 3. select w z1 and w z2 such that they are placed near w o to dampen peaking; the loop gain should cross 0db at a rate of -20db/dec. 4. cancel w esr with compensation pole w p1 (w p1 = w esr ). 5. place a high frequency compensation pole w p2 at half the switching frequency to get the maximum attenuation of the switching ripple and the high frequency noise with adequate phase lag at w c . application information (cont.) 0db gd t z1 z2 p1 p2 c esr o loop gain t(s) figure 2. simplified asymptotic diagram of buck power stage and its compensated loop gain. table 1 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 frequency, (khz) cosc, (pf) switching frequency, f sw vs. c osc .
14 ? 2007 semtech corp. www.semtech.com SC4612 power management pcb layout guidelines careful attention to layout is necessary for successful implementation of the SC4612 pwm controller. high switching currents are present in the application and their effect on ground plane voltage differentials must be understood and minimized. 1) the high power section of the circuit should be laid out first. a ground plane should be used. the number and position of ground plane interruptions should not unnecessarily compromise ground plane integrity. isolated or semi-isolated areas of the ground plane may be deliberately introduced to constrain ground currents to particular areas; for example, the input capacitor and bottom fet ground. 2) the loop formed by the input capacitor(s) (cin), the top fet (m1), and the bottom fet (m2) must be kept as small as possible. this loop contains all the high current, fast transition switching. connections should be as wide and as short as possible to minimize loop inductance. minimizing this loop area will a) reduce emi, b) lower ground injection currents, resulting in electrically ?cleaner? grounds for the rest of the system and c) minimize source ringing, resulting in more reliable gate switching signals. 3) the connection between the junction of m1, m2 and the output inductor should be a wide trace or copper region. it should be as short as practical. since this connection has fast voltage transitions, keeping this connection short will minimize emi. also keep the phase connection to the ic short. top fet gate charge currents flow in this trace. 4) the output capacitor(s) (cout) should be located as close to the load as possible. fast transient load currents are supplied by cout only, and therefore, connections between cout and the load must be short, wide copper areas to minimize inductance and resistance. 5) the SC4612 is best placed over a quiet ground plane area. avoid pulse currents in the cin, m1, m2 loop flowing in this area. gnd should be returned to the ground plane close to the package and close to the ground side of (one of) the output capacitor(s). if this is not possible, the gnd pin may be connected to the ground path between the output capacitor(s) and the cin, m1, m2 loop. under no circumstances should gnd be returned to a ground inside the cin, m1, m2 loop. 6) allow adequate heat sinking area for the power components. if multiple layers will be used, provide sufficent vias for heat transfer application information (cont.) voltage and current waveforms of buck power stage . vout vin + + ids (top fet) ids ( bottom fet ) i (input capacitor) vphase i (inductor) vout i (output capacitor)
15 ? 2007 semtech corp. www.semtech.com SC4612 power management component selection: switching section output capacitors - selection begins with the most critical component. because of fast transient load current requirements in modern microprocessor core supplies, the output capacitors must supply all transient load current requirements until the current in the output inductor ramps up to the new level. output capacitor esr is therefore one of the most important criteria. the maximum esr can be simply calculated from: step current transient i excursion voltage transient maximum v where i v r t t t t esr = = for example, to meet a 100mv transient limit with a 10a load step, the output capacitor esr must be less than 10m ? . to meet this kind of esr level, there are three available capacitor technologies. y g o l o n h c e t h c a e r o t i c a p a c y t q . d q r l a t o t c ) f u ( r s e m ( ? ) c ) f u ( r s e m ( ? ) m u l a t n a t r s e w o l0 3 30 66 0 0 0 20 1 n o c - s o0 3 35 23 0 9 93 . 8 m u n i m u l a r s e w o l0 0 5 14 45 0 0 5 78 . 8 the choice of which to use is simply a cost/performance issue, with low esr aluminum being the cheapest, but taking up the most space. inductor - having decided on a suitable type and value of output capacitor, the maximum allowable value of inductor can be calculated. too large an inductor will produce a slow current ramp rate and will cause the output capacitor to supply more of the transient load current for longer - leading to an output voltage sag below the esr excursion calculated above. the maximum inductor value may be calculated from: () o in t esr v v i c r l ? the calculated maximum inductor value assumes 100% duty cycle, so some allowance must be made. choosing an inductor value of 50 to 75% of the calculated maximum will guarantee that the inductor current will ramp fast enough to reduce the voltage dropped across the esr at a faster rate than the capacitor sags, hence ensuring a good recovery from transient with no additional excursions. we must also be concerned with ripple current in the output inductor and a general rule of thumb has been to allow 10% of maximum output current as ripple current. note that most of the output voltage ripple is produced by the inductor ripple current flowing in the output capacitor esr. ripple current can be calculated from: osc in l f l 4 v i ripple ? ? = ripple current allowance will define the minimum permitted inductor value. power fets - the fets are chosen based on several criteria with probably the most important being power dissipation and power handling capability. top fet - the power dissipation in the top fet is a combination of conduction losses, switching losses and bottom fet body diode recovery losses. a) conduction losses are simply calculated as: in o ) on ( ds 2 o cond v v cycle duty = d where d r i p ? ? = b) switching losses can be estimated by assuming a switching time, if we assume 100ns then: sw in o sw t ns 100 v i p ? ? = or more generally, 2 f ) t t ( v i p osc f r in o sw ? + ? ? = c) body diode recovery losses are more difficult to estimate, but to a first approximation, it is reasonable to assume application information (cont.)
16 ? 2007 semtech corp. www.semtech.com SC4612 power management that the stored charge on the bottom fet body diode will be moved through the top fet as it starts to turn on. the resulting power dissipation in the top fet will be: osc in rr rr f v q p ? ? = to a first order approximation, it is convenient to only consider conduction losses to determine fet suitability. for a 5v in, 2.8v out at 14.2a requirement, typical fet losses would be: e p y t t e fr ) n o ( s d m ( ? )) w ( d pe g a k c a p s 2 0 4 3 l r i5 19 6 . 1d 2 k a p 3 0 2 2 l r i5 . 0 19 1 . 1d 2 k a p 0 1 4 4 i s0 26 2 . 28 - o s using 1.5x room temp r ds(on) to allow for temperature rise. bottom fet - bottom fet losses are almost entirely due to conduction. the body diode is forced into conduction at the beginning and end of the bottom switch conduction period, so when the fet turns on and off, there is very little voltage across it resulting in very low switching losses. conduction losses for the fet can be determined by: ) d 1 ( r i p ) on ( ds 2 o cond ? ? ? = for the example above: e p y t t e fr ) n o ( s d m ( ? )p d ) w (e g a k c a p s 2 0 4 3 l r i5 13 3 . 1d 2 k a p 3 0 2 2 l r i5 . 0 13 9 . 0d 2 k a p 0 1 4 4 i s0 27 7 . 18 - o s each of the package types has a characteristic thermal impedance, for the to-220 package, thermal impedance is mostly determined by the heatsink used. for the surface mount packages on double sided fr4, 2 oz printed circuit board material, thermal impedances of 40 o c/w for the d 2 pak and 80 o c/w for the so-8 are readily achievable. the corresponding temperature rise is detailed below: ( e s i r e r u t a r e p m e t 0 ) c e p y t t e ft e f p o tt e f m o t t o b s 2 0 4 3 l r i6 . 7 62 . 3 5 3 0 2 2 l r i6 . 7 42 . 7 3 0 1 4 4 i s8 . 0 8 16 . 1 4 1 it is apparent that single so-8 si4410 are not adequate for this application, by using parallel pairs in each position, power dissipation will be approximately halved and temperature rise reduced by a factor of 4. input capacitors - since the rms ripple current in the input capacitors may be as high as 50% of the output current, suitable capacitors must be chosen accordingly. also, during fast load transients, there may be restrictions on input di/dt. these restrictions require useable energy storage within the converter circuitry, either as extra output capacitance or, more usually, additional input capacitors. choosing low esr input capacitors will help maximize ripple rating for a given size. application information (cont.)
17 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) application circuit 1: vin = 36v; vout = 5v @ 20a, fsw = 250khz. efficiency: q1 hat2172h q2 hat2172h l1 4.7uh@ 22a c10 0. 1 c12a 330 /6.3v + _ + _ vin=36v vout=5@20a r3 10k r5 5.36k c6 1_cer r1 560k c2 430 p c9 10/50v_cer c3 0. 1 r6 48.7k c4 9.1n d1 mbr0540 c8 2.2/10v c5 1.3n ilim 1 phas e 12 osc 2 ss /e n 3 fb 5 vdd 6 gnd 7 dl 8 drv 9 bst 10 dh 11 ea o 4 u1 SC4612mlp r4* r7 910 c7 1.3n c13b 10/6.3v_cer c12b 330/6.3v fsw =250k h z c13a 330/6.3v c14b 330/50v_al c14a 330/50v_al r4*: if vin > 28v, then r4 & z1 provide vdd clamping z1* SC4612: 36vin, 5vout @ 20a 80% 82% 84% 86% 88% 90% 92% 94% 96% 98% 100% 0 2 4 6 8 10 12 14 16 18 20 22 current, (a) efficiency
18 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) application circuit 2: vin = 24v; vout = 3.3v @ 20a, fsw = 500khz. efficiency: q1 hat2168h q2 hat2165h l1 1.5uh@22a c10 0.1 c12a 180/4v_poscap + _ + _ vin=24v vout=3.3@20a r3 10k r5 6.98k c6 1/16v r8 0 r9 0 r1 560k c2 200p c9 22/25v_cer c3 0.1 r6 39.2k c4 3.9n d1 mbr0540 c8 2.2/10v c5 300p ilim 1 phase 12 osc 2 ss/en 3 fb 5 vdd 6 gnd 7 dl 8 drv 9 bst 10 dh 11 eao 4 u1 SC4612mlp r4opt r7 887 c7 750p c13b 10/6.3v_cer c12b 180/4v fsw=500khz c13a 180/4v c14b 470/35v_al c14a 470/35v_al 25v SC4612: 24vin, 3.3vout @ 20a 80% 82% 84% 86% 88% 90% 92% 94% 96% 98% 100% 0246810121416182022 current, (a) efficiency
19 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) efficiency: application circuit 3: vin = 12v; vout = 2.5v @ 12a, fsw = 800khz q1 hat2168h q2 hat2165h l1 1.4uh@14a c10 0.1 c12a 220/4v_poscap + _ + _ vin=12v vout=2.5@12a r3 10k r5 2.74k c6 1/16v r8 0 r9 0 r1 825k c2 120p c9 22/16v_cer c3 0.1 r6 11.0k c4 3.3n d1 sd107ws c8 2.2/10v c5 300p ilim 1 phase 12 osc 2 ss/en 3 fb 5 vdd 6 gnd 7 dl 8 dr v 9 bst 10 dh 11 eao 4 u1 SC4612mlp r4opt 20 r7 178 c7 2.2n c13b 10/6.3v_cer c12b 220/4v fsw=800khz c13a n/a c14b 47/16v_al c14a 47/16v_al SC4612: 12vin, 2.5vout @ 12a 80% 82% 84% 86% 88% 90% 92% 94% 96% 98% 100% 0123456789101112 current, (a) efficiency
20 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) efficiency: application circuit 4: vin = 5v; vout = 1.35v @ 12a, fsw = 1mhz. q1 hat2168h q2 hat2168h l1 0.47uh@15a c10 0.1 c11 100/6.3_1210_cer + _ + _ vin=5v vout=1.35@12a r3 10k r5 8.87k c6 1 c2 82p c9 100/6.3_1210_cer c3 0.1 r6 13.3k c4 1n d1 sd107ws c8 2.2 c5 33p ilim 1 phase 12 osc 2 ss/en 3 fb 5 vdd 6 gnd 7 dl 8 dr v 9 bst 10 dh 11 eao 4 u1 SC4612mlp r7 649 c7 510p r2 825k fsw=1mhz SC4612: 5vin, 1.35vout @ 12a 80% 82% 84% 86% 88% 90% 92% 94% 96% 98% 100% 012345678910111213 current, (a) efficiency
21 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) evaluation board 1: top layer and components view bottom layer:
22 ? 2007 semtech corp. www.semtech.com SC4612 power management application information (cont.) evaluation board 2 (actual size): top layer: bottom layer:
23 ? 2007 semtech corp. www.semtech.com SC4612 power management outline drawing - mlpd - 12 bxn e millimeters 0.50 bsc .002 .001 0.00 .000 a1 .114 .154 .061 .124 .012 .007 e1 aaa bbb n e l a2 d1 d e b .020 bsc .067 .016 .003 .004 12 .118 (.008) .130 .157 .010 - 1.55 .071 .020 0.30 .161 .122 .134 - .012 3.90 2.90 3.15 - 0.18 .031 min dim a max dimensions inches .035 nom .040 0.80 min 0.02 0.05 3.10 4.10 1.80 3.40 0.50 0.30 1.70 0.40 0.10 0.08 12 3.00 (0.20) 3.30 4.00 0.25 - 1.00 max 0.90 nom a b pin1 indicator (laser mark) a1 a aaa c a2 c seating plane 12 n bbb c a b coplanarity applies to the exposed pad as well as the terminals. controlling dimensions are in millimeters (angles in degrees). notes: 2. 1. d e d1/2 d1 e1/2 e1 lxn land pattern - mlpd - 12 this land pattern is for reference purposes only. consult your manufacturing group to ensure your notes: 1. dim x y h k p c g millimeters inches (2.90) .012 .028 .087 .020 .138 .067 (.114) 0.30 0.70 1.70 0.50 3.50 2.20 dimensions company's manufacturing guidelines are met. 3.60 .142 z
24 ? 2007 semtech corp. www.semtech.com SC4612 power management semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805)498-2111 fax (805)498-3804 contact information outline drawing - soic - 14 see detail detail a a .050 bsc .236 bsc 14 .010 .150 .337 .154 .341 .012 - 14 0.25 1.27 bsc 6.00 bsc 3.90 8.65 - .157 .344 3.80 8.55 .020 0.31 4.00 8.75 0.51 bxn 2x n/2 tips seating aaa c e/2 2x 3 a d a1 e1 bbb c a-b d ccc c a2 (.041) .004 .008 - .028 - - - - 0 .016 .007 .049 .004 .053 8 0 0.20 0.10 - 8 0.40 0.17 1.25 0.10 .041 .010 .069 .065 .010 1.35 (1.04) 0.72 - 1.04 0.25 - - - 1.75 1.65 0.25 0.25 - .010 .020 0.50 - c l (l1) 01 0.25 gage plane h h plane n 12 a e d c h b 3. dimensions "e1" and "d" do not include mold flash, protrusions or gate burrs. -b- controlling dimensions are in millimeters (angles in degrees). datums and to be determined at datum plane notes: 1. 2. -a- -h- side view reference jedec std ms-012, variation ab. 4. l1 ccc aaa bbb 01 n dim e1 d a1 a2 dimensions millimeters min e l h e b c inches nom min a max max nom e z g y p (c) x this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. reference ipc-sm-782a , rlp no. 302a. 2. .291 .087 .024 .118 (.205) inches dimensions z p y x dim c g millimeters .050 (5.20) 7.40 2.20 0.60 3.00 1.27 land pattern - soic - 14

▲Up To Search▲

Price & Availability of SC4612

	To Download SC4612 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .