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1 ha-2546 30mhz, voltage output, two quadrant analog multiplier the ha-2546 is a monolithic, high speed, two quadrant, analog multiplier constructed in the intersil dielectrically isolated high frequency process. the ha-2546 has a voltage output with a 30mhz signal bandwidth, 300v/ s slew rate and a 17mhz control bandwidth. high bandwidth and slew rate make this part an ideal component for use in video systems. the suitability for precision video applications is demonstrated further by the 0.1db gain ?tness to 5mhz, 1.6% multiplication error, -52db feedthrough and differential inputs with 1.2 a bias currents. the ha-2546 also has low differential gain (0.1%) and phase (0.1 degree) errors. the ha-2546 is well suited for agc circuits as well as mixer applications for sonar, radar, and medical imaging equipment. the voltage output simpli?s many designs by eliminating the current to voltage conversion stage required for current output multipliers. for mil-std-883 compliant product, consult the ha-2546/883 datasheet. pinout ha-2546 (pdip, cerdip, soic) top view features high speed voltage output . . . . . . . . . . . . . . . . . 300v/ s low multiplication error . . . . . . . . . . . . . . . . . . . . . . .1.6% input bias currents. . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 a signal input feedthrough . . . . . . . . . . . . . . . . . . . . . -52db wide signal bandwidth . . . . . . . . . . . . . . . . . . . . . 30mhz wide control bandwidth. . . . . . . . . . . . . . . . . . . . . 17mhz gain flatness to 5mhz. . . . . . . . . . . . . . . . . . . . . . 0.10db applications military avionics missile guidance systems medical imaging displays video mixers sonar agc processors radar signal conditioning voltage controlled ampli?r vector generator 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 v z + v z - v+ v x - v x + ga b ga c ga a gnd v ref v yio b v yio a v y + v y - v- v out ref x z y + - ordering information part number temp. range ( o c) package pkg. no. ha1-2546-5 0 to 75 16 ld cerdip f16.3 HA3-2546-5 0 to 75 16 ld pdip e16.3 ha9p2546-5 0 to 65 16 ld soic m16.3 data sheet september 1998 file number 2861.3 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999
2 simpli?d schematic v bias v x - ga c ref gnd v x + ga a ga b + - + - v y - v y + v yio b v yio a v z - v z + v bias out v - v + 1.67k ? ha-2546
3 absolute maximum ratings thermal information voltage between v+ and v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6v output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma operating conditions temperature range HA3-2546-5, ha1-2546-5. . . . . . . . . . . . . . . . . . . . . 0 o c to 75 o c ha9p2546-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 65 o c thermal resistance (typical, note 1) ja ( o c/w) jc ( o c/w) cerdip package. . . . . . . . . . . . . . . . . 75 20 pdip package . . . . . . . . . . . . . . . . . . . 86 n/a soic package . . . . . . . . . . . . . . . . . . . 96 n/a maximum junction temperature ( cerdip package) . . . . . . . .175 o c maximum junction temperature (plastic package) . . . . . . . .150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. notes: 1. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations v supply = 15v, r l = 1k ? , c l = 50pf, unless otherwise speci?d parameter test conditions temp ( o c) min typ max units multiplier performance multiplication error (note 2) 25 - 1.6 3 % full - 3.0 7 % multiplication error drift full - 0.003 - %/ o c differential gain (notes 3, 9) 25 - 0.1 0.2 % differential phase (notes 3, 9) 25 - 0.1 0.3 degrees gain flatness (note 9) dc to 5mhz, v x = 2v 25 - 0.1 0.2 db 5 mhz to 8mhz, v x = 2v 25 - 0.18 0.3 db scale factor error full - 0.7 5.0 % 1% amplitude bandwidth error 25 - 6 - mhz 1% vector bandwidth error 25 - 260 - khz thd + n (note 4) 25 - 0.03 - % voltage noise f o = 10hz, v x = v y = 0v 25 - 400 - nv/ hz f o = 100hz, v x = v y = 0v 25 - 150 - nv/ hz f o = 1khz, v x = v y = 0v 25 - 75 - nv/ hz common mode range 25 - 9- v signal input, v y input offset voltage 25 - 3 10 mv full - 8 20 mv average offset voltage drift full - 45 - v/ o c input bias current 25 - 7 15 a full - 10 15 a input offset current 25 - 0.7 2 a full - 1.0 3 a input capacitance 25 - 2.5 - pf differential input resistance 25 - 720 - k ? small signal bandwidth (-3db) v x = 2v 25 - 30 - mhz full power bandwidth (note 5) v x = 2v 25 - 9.5 - mhz feedthrough note 11 25 - -52 - db cmrr note 6 full 60 78 - db v y transient response (note 10) slew rate v out = 5v, v x = 2v 25 - 300 - v/ s rise time note 7 25 - 11 - ns ha-2546
4 overshoot note 7 25 - 17 - % propagation delay 25 - 25 - ns settling time (to 0.1%) v out = 5v, v x = 2v 25 - 200 - ns control input, v x input offset voltage 25 - 0.3 2 mv full - 3 20 mv average offset voltage drift full - 10 - v/ o c input bias current 25 - 1.2 2 a full - 1.8 5 a input offset current 25 - 0.3 2 a full - 0.4 3 a input capacitance 25 - 2.5 - pf differential input resistance 25 - 360 - k ? small signal bandwidth (-3db) v y = 5v, v x - = -1v 25 - 17 - mhz feedthrough note 12 25 - -40 - db common mode rejection ratio note 13 25 - 80 - db v x transient response (note 10) slew rate note 13 25 - 95 - v/ s rise time note 14 25 - 20 - ns overshoot note 14 25 - 17 - % propagation delay 25 - 50 - ns settling time (to 0.1%) note 13 25 - 200 - ns v z characteristics input offset voltage v x = v y = 0v 25 - 4 15 mv full - 8 20 mv open loop gain 25 - 70 - db differential input resistance 25 - 900 - k ? output characteristics output voltage swing v x = 2.5v, v y = 5v full - 6.25 - v output current full 20 45 - ma output resistance 25 - 1 - ? power supply psrr note 8 full 58 63 - db supply current full - 23 29 ma notes: 2. error is percent of full scale, 1% = 50mv. 3. f o = 3.58mhz/4.43mhz, v y = 300mv p-p , 0 to 1v dc offset, v x = 2v. 4. f o = 10khz, v y = 1v rms , v x = 2v. 5. full power bandwidth calculated by equation: . 6. v y = 0 to 5v, v x = 2v. 7. v out = 0 to 100mv, v x = 2v. 8. v s = 12v to 15v, v y = 5v, v x = 2v. 9. guaranteed by characterization and not 100% tested. 10. see test circuit. 11. f o = 5mhz, v x = 0, v y = 200mv rms . 12. f o = 100khz, v y = 0, v x + = 200mv rms , v x - = -0.5v. 13. v x = 0 to 2v, v y = 5v. 14. v x = 0 to 200mv, v y = 5v. electrical speci?ations v supply = 15v, r l = 1k ? , c l = 50pf, unless otherwise speci?d (continued) parameter test conditions temp ( o c) min typ max units fpbw slew rate 2 v peak --------------------------- ,v peak 5v = = ha-2546
5 test circuits and waveforms figure 1. large and small signal response test circuit vertical scale: 5v/div.; horizontal scale: 50ns/div. v y large signal response vertical scale: 100mv/div.; horizontal scale: 50ns/div. v y small signal response vertical scale: 2v/div.; horizontal scale: 50ns/div. v x large signal response vertical scale: 200mv/div.; horizontal scale: 50ns//div. v x small signal response 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v y + v- v out v+ v x + nc x z y + - + - + - + - nc 50 ? 1k ? 50pf +5v in 0 -5v +5v out 0 -5v 100mv in 0 -100mv 100mv out 0 -100mv 2v in 0 5v out 0 200mv in 0 500mv out 0 ha-2546
6 application information theory of operation the ha-2546 is a two quadrant multiplier with the following three differential inputs; the signal channel, v y + and v y -, the control channel, v x + and v x -, and the summed channel, v z + and v z -, to complete the feedback of the output ampli?r. the differential voltages of channel x and y are converted to differential currents. these currents are then multiplied in a circuit similar to a gilbert cell multiplier, producing a differential current product. the differential voltage of the z channel is converted into a differential current which then sums with the products currents. the differential ?roduct/sum?currents are converted to a single- ended current and then converted to a voltage output by a transimpedance ampli?r. the open loop transfer equation for the ha-2546 is: the scale factor is used to maintain the output of the multiplier within the normal operating range of 5v. the scale factor can be de?ed by the user by way of an optional external resistor, r ext , and the gain adjust pins, gain adjust a (ga a), gain adjust b (ga b), and gain adjust c (ga c). the scale factor is determined as follows: the scale factor can be adjusted from 2 to 5. it should be noted that any adjustments to the scale factor will affect the ac performance of the control channel, v x . the normal input operating range of v x is equal to the scale factor voltage. the typical multiplier con?uration is shown in figure 2. the ideal transfer function for this con?uration is: the v x- pin is usually connected to ground so that when v x+ is negative there is no signal at the output, i.e. two quadrant operation. if the v x input is a negative going signal the v x+ pin maybe grounded and the v x- pin used as the control input. the v y- terminal is usually grounded allowing the v y+ to swing 5v. the v z+ terminal is usually connected directly to v out to complete the feedback loop of the output ampli?r while v z- is grounded. the scale factor is normally set to 2 by connecting ga b to ga c. therefore the transfer equation simpli?s to v out = (v x v y ) / 2. offset adjustment the signal channel offset voltage may be nulled by using a 20k ? potentiometer between v yio adjust pins a and b and connecting the wiper to v-. reducing the signal channel offset will reduce v x ac feedthrough. output offset voltage can also be nulled by connecting v z- to the wiper of a 20k ? potentiometer which is tied between v+ and v-. capacitive drive capability when driving capacitive loads >20pf, a 50 ? resistor is recommended between v out and v z+ , using v z+ as the output (see figure 2). this will prevent the multiplier from going unstable. power supply decoupling power supply decoupling is essential for high frequency circuits. a 0.01 f high quality ceramic capacitor at each supply pin in parallel with a 1 f tantalum capacitor will provide excellent decoupling. chip capacitors produce the best results due to the close spacing with which they may be placed to the supply pins minimizing lead inductance. adjusting scale factor adjusting the scale factor will tailor the control signal, v x , input voltage range to match your needs. referring to the simplified schematic on the front page and looking for the v x input stage, you will notice the unusual design. the internal reference sets up a 1.2ma current sink for the v x differential pair. the control signal applied to this input will be forced across the scale factor setting resistor and set the current flowing in the v x+ side of the differential pair. when the v out = a (v x+ - v x- ) (v y+ - v y- ) sf - (v z+ - v z- ) where; a = output ampli?r open loop gain sf = scale factor v x , v y , v z = differential inputs sf = 2, when ga b is shorted to ga c sf ? 1.2 r ext , when r ext is connected between ga a and ga c (r ext is in k ? ) sf ? 1.2 (r ext + 1.667k ? ), when r ext is connected to ga b and ga c (r ext is in k ? ) v out = (v x+ - v x- ) (v y+ - v y- ) 2 + v z- , when v x 0v 0 , when v x < 0v 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v y + v- v out v+ v x + nc x z y + - + - + - + - nc 50 ? 1k ? 50pf figure 2. ha-2546
7 current through this resistor reaches 1.2ma, all the current available is flowing in the one side and full scale has been reached. normally the 1.67k ? internal resistor sets the scale factor to 2v when the gain adjust pins b and c are connected together, but you may set this resistor to any convenient value using pins 16 (ga a) and 15 (ga c) (see figure 3). typical applications automatic gain control in figure 4 the ha-2546 is con ?ure d in a true automatic gain control or agc application. the ha-5127, low noise op amp, provides the gain control level to the x input. this level will set the peak output voltage of the multiplier to match the reference level. the feedback network around the ha-5127 provides stability and a response time adjustment for the gain control circuit. this multiplier has the advantage over other agc circuits, in that the signal bandwidth is not affected by the control signal gain adjustment. voltage controlled ampli?r a wide range of gain adjustment is available with the voltage controlled ampli?r con?uration shown in figure 5. here the gain of the hfa0002 is swept from 20v/v at a control voltage of 0.902v to a gain of almost 1000v/v with a control voltage of 0.03v. video fader the video fader circuit provides a unique function. here ch b is applied to the minus z input in addition to the minus y input. in this way, the function in figure 6 is generated. v mix will control the percentage of ch a and ch b that are mixed together to produce a resulting video image or other signal. many other applications are possible including division, squaring, square-root, percentage calculations, etc. please refer to the ha-2556 four quadrant multiplier data sheet for additional applications. 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v y + v- v out v+ v x + nc x z y + - + - + - + - nc 1k multiplier, v out = v x v y / 2v scale factor = 2v 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v y + v- v out v+ v x + nc x z y + - + - + - + - nc 1k multiplier, v out = v x v y / 5v scale factor = 5v 4.167k figure 3. setting the scale factor 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v y + v- v out v+ nc x z y + - + - + - + - nc 50 ? 5k ? 10k ? - + ha-5127 0.01 f 10k ? 0.1 f 1n914 3.3v 0.1 f +15v 20k ? figure 4. automatic gain control ha-2546
8 figure 5. voltage controlled amplifier figure 6. video fader 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v- v in v+ nc x z y + - + - + - + - nc - + hfa0002 5k ? v out 500 ? voltage gain (db) frequency (hz) 100 phase (degrees) 180 135 90 45 0 100k 10m 100m 1k 10k v gain = 0.030v 1m 80 60 40 20 0 -20 -40 -60 -80 -100 0.126v 0.4v 0.902v 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 ref nc nc v mix (0v to 2v) v- v+ nc x z y + - + - + - + - nc v out 50 ? ch a ch b v out = ch b + (ch a - ch b) v mix / scale factor scale factor = 2 v out = all ch b; if v mix = 0v v out = all ch a; if v mix = 2v (full scale) v out = mix of ch a and ch b; if 0v < v mix < 2v ha-2546
9 typical performance curves v s = 15v, t a = 25 o c, see test circuit for multiplier con?uration figure 7. v y gain and phase vs frequency figure 8. v x gain and phase vs frequency figure 9. v y feedthrough vs frequency figure 10. v x feedthrough vs frequency figure 11. various v y frequency responses figure 12. various v x frequency responses gain (db) frequency (hz) 9 6 3 0 -3 -6 phase shift (degrees) 0 45 90 135 180 1m 10m 100m 10k 100k c l = 50pf c l = 50pf c l = 0pf r l = 1k, v x = 2v dc , v y = 200mv rms c l = 0pf gain (db) frequency (hz) phase shift (degrees) 0 45 90 135 180 1m 10m 100m 10k 100k -10 10 5 0 -5 15 r l = 1k, v x + = 200mv rms , v y = 5v dc , v x - = -1v dc gain (db) frequency (hz) 1m 10m 100m 10k 100k -10 -20 -30 -40 -50 -60 -70 -80 -90 v x = 0v, r l = 1k, v y = 200mv rms gain (db) frequency (hz) 1m 10m 100m 10k 100k -10 -20 -30 -40 -50 0 v x = -1.0v dc v x = -0.5v dc v x = -2.0v dc r l = 1k, v x + = 200mv rms , v y = 0v frequency (hz) 1m 10m 100m 10k 100k v x = 1.0v dc v x = 0.5v dc v x = 2.0v dc gain (db) -12 -15 9 6 3 0 -3 -6 -9 r l = 1k, c l = 50pf, v y = 200mv rms frequency (hz) 1m 10m 100m 10k 100k gain (db) 15 10 5 0 -5 -10 -15 -20 v y = 5v dc v y = 2v dc v y = 0.5v dc v y = 1v dc v x + = 200mv rms , r l = 1k, v x - = -1v dc ha-2546
10 figure 13. voltage noise density figure 14. v y offset and bias current vs temperature figure 15. offset voltage vs temperature figure 16. v x offset and bias current vs temperature figure 17. v out vs v supply figure 18. v y cmrr vs frequency typical performance curves v s = 15v, t a = 25 o c, see test circuit for multiplier con?uration (continued) frequency (hz) 100 1k 10k 110 voltage noise (nv/ hz) 975 900 825 750 675 600 525 450 375 300 225 150 75 0 100k 14 12 10 -2 -4 8 6 4 2 0 current ( a) temperature ( o c) 0 25 50 75 100 125 -55 -25 bias current offset current 10 -2 -4 8 6 4 2 0 v y temperature ( o c) 0 25 50 75 100 125 -55 -25 -6 -8 -10 v x v z offset voltage (mv) 3 -1 2 1 0 bias current offset current current ( a) temperature ( o c) 0 25 50 75 100 125 -55 -25 5 1 4 3 2 -v out +v out v supply |v out | 5 17 15 12 8 7 0 6 7 cmrr (db) frequency (hz) 1k 10k 100k 1m 10m 100m 100 0 120 100 80 60 40 20 v x = 0v v x = 2v v ycm = 200mv rms ha-2546
11 figure 19. v x common mode rejection ratio vs frequency figure 20. psrr vs frequency figure 21. supply current vs temperature figure 22. cmr vs v supply figure 23. psrr vs temperature figure 24. multiplication error vs v y typical performance curves v s = 15v, t a = 25 o c, see test circuit for multiplier con?uration (continued) cmrr (db) frequency (hz) 1k 10k 100k 1m 10m 100m 100 v y = 0v v y = 2v 0 120 100 80 60 40 20 v x = 200mv rms psrr (db) frequency (hz) 1k 10k 100k 1m 10m 100m 100 0 100 80 60 40 20 +pssr -pssr v y = v x = 0v temperature ( o c) -55 +i cc -i cc supply current (ma) 25 20 15 125 -25 0 25 50 75 100 14 6 12 10 8 cmr(-) 5 17 cmr(+) |cmr| v supply 4 2 0 15 12 8 7 temperature ( o c) +psrr -psrr psrr (db) 100 80 60 40 20 0 -55 0 25 50 75 100 125 -25 -6 -4 -2 0 2 4 6 -1.5 -1 -0.5 0 0.5 1 1.5 y input (v) multiplier error (%fs) x = 1 x = 1.2 x = 1.4 x = 1.6 x = 1.8 x = 2 ha-2546
12 figure 25. figure 26. figure 27. figure 28. worst case multiplication error vs temperature figure 29. multiplication error vs temperature figure 30. gain variation vs frequency typical performance curves v s = 15v, t a = 25 o c, see test circuit for multiplier con?uration (continued) -6 -4 -2 0 2 4 6 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 y input (v) multiplier error (%fs) x = 0 x = 1 x = 0.4, 0.6 x = 0.2 x = 0.8 0 0.5 1 1.5 2 2.5 -1.5 -1 -0.5 0 0.5 1 1.5 2 x input (v) multiplier error (%fs) y = -3 y = -4 y = -5 y = 0 y = -1 y = -2 0 0.5 1 1.5 2 2.5 -2 -1.5 -1 -0.5 0 0.5 1 x input (v) multiplier error (%fs) y = 5 y = 4 y = 3 y = 2 y = 1 y = 0 temperature ( o c) multiplication error (%) 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 -55 -25 temperature ( o c) multiplication error (%) 0.5 0.4 0.3 0.2 0.1 0.0 -55 0 25 50 75 100 125 -25 gain (db) frequency (hz) 1m 10m 100m 10k 100k c l = 50pf c l = 0pf 0.6 0.4 0.2 0 -0.2 r l = 1k, v x = 2v dc , v y = 200mv rms ha-2546
13 figure 31. scale factor vs temperature figure 32. output voltage swing vs load resistance figure 33. slew rate vs temperature figure 34. rise time vs temperature figure 35. supply current vs supply voltage typical performance curves v s = 15v, t a = 25 o c, see test circuit for multiplier con?uration (continued) temperature ( o c) scale factor 2.010 2.008 2.006 2.004 2.002 2.000 1.998 1.996 1.994 1.992 1.990 0 25 50 75 100 125 -55 -25 peak output voltage (v) 1k 10k 100k 10 100 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 load resistance ( ? ) v s = 10 v s = 15 v s = 12 v s = 8 f o = 10khz, v x = 2v dc , thd < 0.1% 0 20 40 60 80 100 120 -60 -40 -20 temperature ( o c) 500 400 300 200 100 0 slew rate (v/ s) v y channel v x channel temperature ( o c) v y channel v x channel 0 20 40 60 80 100 120 -60 -40 -20 24 22 20 18 16 14 12 10 8 6 4 2 0 rise time (ns) supply current (ma) 28 26 24 22 20 18 16 14 12 10 8 6 4 2 02468101214161820 supply voltage ( v) +i cc -i cc ha-2546
14 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site http://www.intersil.com die characteristics die dimensions: 79.9 mils x 119.7 mils x 19 mils metallization: type: al, 1% cul thickness: 16k ? 2k ? passivation: type: nitride (si 3 n 4 ) over silox (sio 2 , 5% phos) silox thickness: 12k ? 2k ? nitride thickness: 3.5k ? 2k ? transistor count: 87 metallization mask layout ha-2546 21 v yio b3 v yio a4 v y +5 v y -6 78 910 11 v+ 12 v x - 13 v x + 14 ga b 15 16 gnd v ref v- v out v z +v z - ga a ga c ha-2546

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