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ver1.1 1 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr LD3003 128 segment lcd controller and driver ver. 1 . 1 / july. 2013 this document is a general product description and is subject to change without notice. ldt inc. does not assume any responsibility for use of circuits described. LD3003 128 segment lcd controller and driver
ver1.1 2 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr overview LD3003, lcd display driver ic with microcontroller displays 1/4 - duty lcd with up to 128 segments. LD3003 uses a serial interface data input protocol. this device is compatible with mc14lc5003 of motorola. features ? supports 1/4 duty lcd drive under serial data control. ? drives up to 128 segments. ? supports serial interface data input protocol with the system controller. ? operating voltage range : 2.7v ~ 5.5v ? quiescent supply current : 30ua @ 2.7v v dd ? operating temperature range : - 40 to 85 o c ? package : 52mqfp, 44mqfp ? major applications : segmented alphanumeric, bar graph, dot matrix, custom part number package ta ld 3003 - 52 qfp 52 qfp - 40 c to 85 c ordering information
ver1.1 3 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr parameter symbol conditions ratings unit maximum supply voltage vdd max vdd C 0.5 to +6.5 v vlcd max vlcd C 0.5 to +6.5 v input voltage vin 1 din, dclk, enb C 0.5 to +6.5 v vin 2 osc1 C 0.5 to vdd + 0.5 v output voltage vout 1 osc2 C 0.5 to vdd + 0.5 v vout 2 seg1 to seg32, com1 to com4 C 0.5 to vlcd + 0.5 v output current iout 1 seg1 to seg32 300 a iout 2 com1 to com4 1 ma allowable power dissipation pd max ta = 85 c 150 mw operating temperature topr C 40 to +85 c storage temperature tstg C 65 to +150 c absolute maximum ratings (ta = 25 c, vss = 0 v) electrical characteristics (ta = 25 c, vss = 0 v) parameter symbol vdd vlcd min typical max unit input high - level voltage vih 2.8 5 2 v 5.5 5 3.85 input low - level voltage vil 2.8 5 0.85 v 5.5 5 1.65
ver1.1 4 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr parameter symbol vdd vlcd min typical max unit frequencies osc2 frequenct @ r1; r1 =200 ? osc2 frequenct @ r2; r2 =996 ? ) fosc2 5 5 100 - 150 khz fosc2 5 5 23 - 33 supply standby current (no clock) idds 2.7 - - 15 30 a 5.5 - - 18 50 ilcds - 2.7 - 20 800 - 5.5 - 150 1500 supply current no loading loading = 270pf iddq 2.7 - 30 a 2.7 - 70 no loading loading = 270pf 5.5 - 170 5.5 - 400 no loading no loading ilcdq - 2.7 40 - 5.5 70 input leakage iih - - - 0.1 0.1 a iil - - - 0.1 0.1 a output high - level voltage seg to seg32, io= - 20ua com1 to com4, io= - 100ua voh1 2.7 2.7 vlcd - 0.15 vlcd - 0.1 vlcd v voh2 2.7 2.7 vlcd - 0.15 vlcd - 0.1 vlcd output low - level voltage seg to seg32, io=20ua com1 to com4, io=100ua vol1 2.7 2.7 - 0.1 0.15 v vol2 2.7 2.7 - 0.1 0.15 electrical characteristics (continued)
ver1.1 5 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr parameter symbol vdd vlcd min typical max unit pulse width, dclk t w 5 - 100 - n s 3 - 100 - dclk rise/fall time t r, t f 5 - - 120 s 3 - - 120 setup time, din to dclk t su 5 - 20 - ns 3 - 20 - hold time, din to dclk t h 5 - 40 - ns 3 - 60 - hold time for start condition t start 5 - 100 - ns 3 - 100 - hold time for stop condition t stop 5 - 100 - ns 3 - 100 - dclk low to enb high t se 5 - 20 - ns 3 - 20 - enb high to dclk high t sd 5 - 20 - ns 3 - 20 - enb high pulse width t we 5 - 100 - ns 3 - 100 - enb low to dclk high t hd 5 - 20 - ns 3 - 20 - electrical characteristics (continued)
ver1.1 6 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr switching waveforms dclk t f t r t w t w 90% 50% 10% din dclk t start t su valid t h t stop 50% 50% dclk enb 50% 50% t hd t we t we t se t sd first clk last clk
ver1.1 7 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr pin assignment 44 mqfp LD3003 (44mqfp) dclk seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 12 13 14 15 16 17 18 19 20 21 22 seg19 seg18 seg17 seg16 seg15 vlcd vss seg14 seg13 seg12 seg11 33 32 31 30 29 28 27 26 25 24 23 seg31 seg32 osc1 osc2 vdd com1 com2 com3 com4 enb din 1 2 3 4 5 6 7 8 9 10 11 44 43 42 41 40 39 38 37 36 35 34 LD3003 (52mqfp) din dclk nc seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 14 15 16 17 18 19 20 21 22 23 24 25 26 nc seg19 seg18 seg17 seg16 seg15 vlcd vss seg14 seg13 seg12 seg11 nc 39 38 37 36 35 34 33 32 31 30 29 28 27 nc osc1 osc2 vdd com1 com2 com3 com4 nc nc nc enb nc 52 mqfp 1 2 3 4 5 6 7 8 9 10 11 12 13 52 51 50 49 48 47 46 45 44 43 42 41 40
ver1.1 8 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr block diagram common driver segment driver oscillator osc1 vlcd com4 com3 com2 com1 seg32 seg31 seg2 seg1 osc2 common, segment driver voltage and timing generator por 128bit shift register 128bit data register interface controller dclk din enb
ver1.1 9 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr LD3003 pin discreption pin name pin no (52mqfp) functions i/o handling when unused seg32 to seg1 1 to 13 15 to 19 22 to 25 27 to 36 segment outputs for displaying the display data transferred by serial data input. o open com4 to com1 45 to 48 common driver outputs. the frame frequency fo is given by: fo = 100 hz at fosc=100khz. o open osc1 51 oscillator input pin. connected resistor with osc2 pin. i gnd osc2 50 oscillator output pin. connected resistor with osc1 pin. o open dclk din enb 38 39 41 synchronization clock input pin. transfer data input pin. enable input pin . these pins are connected to the microcontroller. i gnd vlcd 20 used to apply the lcd drive voltage externally. i open vdd 49 logic block power supply. provide a voltage in the range 2.7 to 5.5 v. - - nc 14 26 37 40 42 43 44 52 no connection pins - open vss 21 ground pin. connect to ground. - -
ver1.1 10 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr serial data transfer format when enb pin is fixed to vdd b) continuous transfer case a) 128 bit data only transfer case dclk enb (enb = h) start 8 bits address 128 bits data stop internal data latch signal din com4 com3 com2 com1 com4 com3 com2 com1 com4 com3 com2 com1 seg1 seg2 seg32 dclk enb (enb = h) start 8 bits address 128 bits data internal data latch signal next 128 bits data din com4 com3 com2 com1 com4 com3 com2 com1 com4 com3 com2 com1 seg1 seg32 seg1 before communication with LD3003 can begin, a start condition must be set up on the bus by the transmitter. to establish a start condition, the transmitter must pull the data line( din ) low for at least one clock - pulse time while the clock line( dclk ) is high. the idle state for the clock line and data line is the high state. after the start condition has been established, an 8 bits address( 01111110 ) should be sent by the transmitter. if the address sent corresponds to the address of LD3003 then on each successive clock pulse, the addressed device will accept a data bit. if the enb pin is permanently high, then the addressed LD3003s internal counter latches the data to be displayed after 128 data bits have been received. otherwise, the control of this latch function may be overridden by holding the enb line low until the new data is required to be displayed, then a high pulse should be sent on the enb line. the high pulse must be sent during dclk high( clock idle ). to end communication with LD3003, a stop condition should be setup on the bus( or another start condition maybe set up if another communication is desired. ). to establish a stop condition, the transmitter must pull the data line high for at least one clock - pulse time while the clock line is high.
ver1.1 11 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr b) under 128bit data transfer case when enb pin is used a) 128 bit data only transfer case dclk enb start 8 bits address 128 bits data stop internal data latch signal din com4 com3 com2 com1 com4 com3 com2 com1 com4 com3 com2 com1 seg1 seg2 seg32 dclk enb start 8 bits address 120 bits data internal data latch signal next n bits data * * in this case, the 8bit data of seg1, seg2 are latched by the previous seg31, seg32 data. din com4 com3 com2 com1 com4 com3 com2 com1 com4 com3 com2 com1 seg3 seg32 segm
ver1.1 12 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr lcd driving waveform com1 com2 com3 seg1 ~ seg32 off at com1 ~ com4 seg1 ~ seg32 on at com1 ~ com4 seg1 ~ seg32 on at com1 only seg1 ~ seg32 on at com2 only seg1 ~ seg32 on at com3 only seg1 ~ seg32 on at com1 and com2 seg1 ~ seg32 on at com1 and com3 seg1 ~ seg32 on at com2 and com3 vlcd 2/3(vlcd) 1/3(vlcd) 0 com4 seg1 ~ seg32 on at com1, com2 and com3 seg1 ~ seg32 on at com4 only seg1 ~ seg32 on at com2 and com4 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 vlcd 2/3(vlcd) 1/3(vlcd) 0 time frame time frame time frame
ver1.1 13 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr application information portc equ $02 portc ddrc equ $06 portdc sen equ $07 enable pin, pc7 scl equ $06 clock pin, pc6 sda equ $05 data pin, pc5 dout equ $ff output data org $0050 w1 rmb 1 count rmb 1 org $1ffe address of reset vector of mc68hc05c4 fcb #$01 reset vector fcb #$00 ********************* main program start at 0100 ********************** org $0100 start lda #dout set data line output sta ddrc again ldx #$00 bset sda, portc idle state bset scl, portc clock and data are high ready bset sen, portc en=1 lda #$11 set address and 8 characters sta w1 bclr sda, portc start condition, data low while clock high lbyte clc lda #$08 sta count 8 bits to shift lda send, x get a byte incx dout sck stb mc68hc05 din osc1 dclk enb osc2 com1 ~ com4 seg1 ~ sg32 LD3003 ? duty lcd panel r=470k serial interface example between LD3003 and mc68hc05 serial data interface method
ver1.1 14 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr lbit bclr scl, portc clock low rola bcc dzero data bit=0? bset sda, portc no, bit=1 and data high jump clkhi dzero bclr sda, portc data low clkhi bset scl, portc clock high dec count bne lbit dec w1 bne lbyte last byte? stop bclr scl, portc bclr sda, portc stop condition bset scl, portc data goes high while clock high bset sda, portc bclr sen, portc en=0 rts ************** end of program ******************** *************** lcd address and data ************ send fcb $7e lcd driver address fcb $ff, $ff, $ff, $ff, $ff, $ff, $ff, $ff data to sent fcb $ff, $ff, $ff, $ff, $ff, $ff, $ff, $ff rts
ver1.1 15 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr 52 pin mqfp (10 x 10 body) 10.10(0.398) 9.90(0.390) 7.80 (0.307) 7.80 (0.307) 13.45 (0.530) 12.95 (0.510) 0.20(0.008) m c a C b s d s 0.20(0.008) m h a C b s d s 1 52 13 40 39 27 26 14 0.05(0.002) a C b 10.10(0.398) 9.90(0.390) 0.20(0.008) m h a C b s d s 0.05(0.002) a C b 13.45 (0.530) 12.95 (0.510) 0.20(0.008) m c a C b s d s 0.65bsc(0.026bsc) 5 o ~10 o all sides - h - datum plane 2.45(0.096) 2.10(0.083) 2.10(0.083) 2.00(0.079) 0.23(0.009) 0.13(0.005) after plane see detail a - h - 4 datum plane + + detail a 0.95(0.037) 0.65(0.026) (1.60(0.063) a 0 o min. 0 o ~7 o r0.13(0.005)min. r0.30(0.012) 0.13(0.005) 0.25 ( 0.010) 0.102(0.004) - c - seating plane 0.45(0.018) 0.35(0.014) 0.38(0.015) 0.22(0.009) package information
ver1.1 16 LD3003 128 segment lcd controller and driver ldt inc. we bldg. 5f, 126 - 33 han - dle 1ro, seobuk - gu , cheonan , chungnam , korea , 331 - 220 tel. +82 41 520 7300 fax. +82 41 520 7337 www.ldt.co.kr the products listed herein are designed for ordinary electronic applications, such as electrical applications, audio - visual equipment, communications devices and so on. hence, it is advisable that the devices should not be used in medical instrument, surgical implants, aerospace machinery, nuclear power control systems, disaster/crime - prevention equipment and the like. misusing those products may directly or indirectly endanger human life, or cause injury and property loss. ldt will not take any responsibilities regarding the misusage of the products mentioned above. anyone who purchases any products described herein with the above - mentioned intention or with such misused application should accept full responsibility and indemnify. ldt and its distributors and all their officers and employees shall defend jointly and severally against any and all claims and litigation and all damages, cost and associated with such intention and manipulation.

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