i ntegrated c ircuits d ivision ds-CPC5001-r01 www.ixysic.com 1 e 3 pb features ? isolates one signal in each direction ? operates from 2.7v to 5.5v ? buffered inputs - no external led drive required ? voltage level translation ? hysteresis at inputs for noise rejection ? slew-limited drivers reduce emi ? power-down to hi-z does not load outputs ? 5mbaud data rate ? 8-pin dip or surface mount packages applications ? isolated signal monitoring and control ? power-over-ethernet ? power supply high-side interface ? logic-level translation ? microprocessor system interface ? inter-integrated circuit (i 2 c) interface ? serial peripheral interface (spi) ? full duplex communication ? isolated line receiver ? isolated data acquisition systems approvals ? ul recognized component: file e76270 ? csa: pending ? en/iec 60950: pending description the CPC5001 is a dual, non-inverting digital optical isolator with buffered-logic inputs and open-drain outputs. channel 1 propagates a signal from side a to side b, while channel 2 sends a signal from side b to side a. it provides galvanic isolation up to 3750v rms . when the two sides are powered by supplies with different voltages, it also functions as a logic level translator for supply voltages as low as 2.7v or as high as 5.5v. available in 8-pin dip and surface mount packages, it functionally replaces two logic buffers and two single-channel optoisolators. internal bandgap references regulate the led drive currents to 3ma to reduce peak power requirements. unlike transformer or capacitive isolators, optical isolation passes dc signal s, and does not need to be clocked periodically to refresh state. buffered signals will always return to their proper value after a transient interruption at either side. ordering information figure 1. CPC5001 functional block diagram part description CPC5001g 8-pin dip in tubes (50 / tube) CPC5001gs 8-pin surface mount (50 / tube) CPC5001gstr 8-pin surface mount (1000 / reel) a gnda b gndb v dda gnda v dda channel 2 v ddb led in2 v dda out2 a v dda led in1 v ddb out1 b gndb v ddb v ddb channel 1 1 2 3 4 8 7 6 5 CPC5001 dual, one channel each direction digital optical isolator
i ntegrated c ircuits d ivision CPC5001 2 www.ixysic.com r01 1. specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.5 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.6 general conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.7 electrical parametric specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.8 timing specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.9 common mode rejection specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2. switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3. performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5. manufacturing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.1 moisture sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.2 esd sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.3 reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.4 board wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.5 mechanical dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
i ntegrated c ircuits d ivision CPC5001 r01 www.ixysic.com 3 1 specifications 1.1 package pinout 1.2 pin description 1.3 absolute maximum ratings electrical absolute maximum ratings are at 25c. vo ltages with respect to local ground: gnda or gndb. 1 derate total power by 7.5mw/c above 25c. absolute maximum ratings are stress rating s. stresses in excess of these ratings c an cause permanent damage to the device. functional operation of the device at condit ions beyond those indicated in the operational sections of this data sheet is not implied. 1.4 esd rating 1.5 thermal characteristics 1 2 3 4 8 7 6 5 pin# name description 1in1 input, channel 1 2gnda supply return - side a 3out2 output, channel 2 4 v dda supply voltage - side a 5in2 input, channel 2 6 gndb supply return - side b 7out1 output, channel 1 8 v ddb supply voltage - side b parameter symbol min max units supply voltage, side a v dda -0.5 +6.5 v supply voltage, side b v ddb -0.5 +6.5 v input voltage v iox -0.3 v ddx + 0.3 v total package power dissipation 1 p tot -800mw isolation voltage, input to output - 60 seconds 3750 - v rms 2 seconds 4500 - operating temperature t a -40 +85 c operating relative humidity (non-condensing) rh 585 % storage temperature t stg -50 +125 c esd rating (human body model) 4000v parameter conditions symbol min typ max units thermal resistance, junction to ambient free air r ? ja - 114 - c/w
i ntegrated c ircuits d ivision CPC5001 4 www.ixysic.com r01 1.6 general conditions unless otherwise specified, minimum and maximum va lues are guaranteed by production testing requirements. typical values are characteristic of the device at 25 c, and are the result of engineering evaluations. they are provided for information purposes only, and are not part of the manufacturing testing requirements. specifications cover the operating temperature range t a = -40c to +85c, unless otherwise specified. side a is the same as side b, and channel 1 is the same as channel 2; therefore, the electrical and timing specifications apply to both sides/channels. 1.7 electrical parametric specifications 1.8 timing specifications note 1: see ?switching waveforms? on page 5 . 1.9 common mode rejection specifications parameter conditions symbol min typ max units electrical supply voltage i sink =6ma v dd 2.7 - 5.5 v supply current v dd =3.3v, i sink =0ma i dd -4.3- ma i sink =6ma -4.4- v dd =5.5v, i sink =0ma, t a =25c -57.5 leakage current in1=out2=v dda , in2=out1=v ddb i leak -0.0110 ? a falling input low threshold 2.7v < v dd < 5.5v v il 0.3v dd 0.42v dd - v rising input high threshold 2.7v < v dd < 5.5v v ih - 0.57v dd 0.7v dd hysteresis 2.7v < v dd < 5.5v v hyst - 0.15v dd - v output drive v dd =2.7v, i sink =3ma v ol - 0.21 0.35 v v dd =2.7v, i sink =6ma -0.420.7 v dd =3.3v, i sink =6ma -0.38- output temperature coefficient 2.7v < v dd < 5.5v, i sink =6ma tc -+1.2-mv/c parameter conditions symbol min typ max units timing clock frequency i sink =6ma, c load =20pf f max -5-mhz propagation delay (see note 1) v dda =v ddb =3.3v, r pua =475 ? , r pub =475 ? c in_a =c in_b =20pf v in =0.5v dd_in to v out =0.5v dd_out ns high to low t phl 40 60 100 low to high t plh 40 135 250 pulse width distortion t plh - t phl pwd -25 75 170 ns parameter conditions symbol min typ max units common mode rejection common mode transient immunity v cm =20v p-p , v dd =3.3v, t a =25c v out = high v out >2v cm h 5- - kv/ ? s v out = low v out <0.8v cm l 7- -
i ntegrated c ircuits d ivision CPC5001 r01 www.ixysic.com 5 2 switching waveforms 0.5 ? v dd = 1.65v 0.5 ? v dd = 1.65v t plh 0 1.0 2.0 3.0 4.0 0 1.0 2.0 3.0 4.0 0 0.275 0.55 0. 825 1.1 volts volts time (s) time (s) v in v out t phl 0 0.275 0.55 0.825 1.1
i ntegrated c ircuits d ivision CPC5001 6 www.ixysic.com r01 3 performance characteristics 4 functional description 4.1 introduction the CPC5001 combines the functions of two input buffer/led driver gates and two unidirectional logic optoisolators in a single 8-pin package. the isolators are arranged for one input and one output at each side of the isolation barrier, which enables channel 1 to send signals from side a to side b, and channel 2 to send signals from the side b to the side a. if different supply voltage levels are used at each side, then the part, in conjunction with its external pullup resistors, will perform logic level translation for v dd between 2.7v and 5.5v at either side. the part provides galvanic isolation for voltages up to 3750v rms . its cmos circuitry includes a bandgap reference to ensure that the leds receive consistent drive current levels over the allowed range of v dd voltages. the supply currents at i dda and i ddb are much smaller than those required by bipolar solutions, and are stable over temperature. the circuits also ensure that the i dd current into each v dd package pin remains constant for both high and low input signals. this can greatly reduce the size of external decoupling capacitors when compared with optoisolators fabricated in a bipolar process wherein the supply current can double when the led is on. the rotationally symmetric pinout ensures that the part operates normally even if installed with 180 rotation. temperature (oc) -40 -20 0 20 40 60 8 0100 output volta g e (v) 0.25 0.30 0.35 0.40 0.45 0.50 0.55 typical output volta g e, v ola , v olb vs. temperature (i sinka =6ma) v dd =2.7v v dd =3.3v v dd =5.5v supply volta g e (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 supply current (ma) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply current i dda , i ddb vs. supply volta g e supply volta g e (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 volta g e out (v) 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 log ic-low output level v ol vs. supply volta g e (i sink =6ma) temperature (oc) -40 -20 0 20 40 60 8 0 100 propa g ation delay (ns) 40 60 80 100 120 140 160 propa g ation delay a to b and b to a (v dd =3.3v, c l =20pf, r pu =475) t phl t plh temperature (oc) -40 -20 0 20 40 60 8 0 100 supply current (ma) 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 supply current i dda , i ddb vs. temperature (v dd =5.5v, r pu =820) supply volta g e (v) v x / v dd 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 v il fallin g, v ih rising vs. supply volta g e v ih v il 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
i ntegrated c ircuits d ivision CPC5001 r01 www.ixysic.com 7 5 manufacturing information 5.1 moisture sensitivity all plastic encapsulated semiconductor packages are susc eptible to moisture ingression. ixys integrated circuits division clas sified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as establ ished by the listed specificati ons could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . 5.2 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . 5.3 reflow profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. 5.4 board wash ixys integrated circuits division recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable. since ixys integrated ci rcuits division employs the us e of silicone coating as an optical waveguide in many of its optically isolated products, the use of a short drying bake may be necessary if a wash is used after solder reflow processes. chlorine-based or fluorine-based solvents or fluxes should not be used. cleaning methods that employ ul trasonic energy should not be used. device moisture sensitivity level (msl) rating CPC5001g / CPC5001gs msl 1 device maximum temperature x time CPC5001g / CPC5001gs 250c for 30 seconds e 3 pb
i ntegrated c ircuits d ivision CPC5001 8 www.ixysic.com r01 5.5 mechanical dimensions 5.5.1 CPC5001g package 5.5.2 CPC5001gs package dimensions mm (inches) pcb hole pattern 2.540 0.127 (0.100 0.005) 6.350 0.127 (0.250 0.005) 9.144 0.508 (0.360 0.020) 0.457 0.076 (0.018 0.003) 9.652 0.381 (0.380 0.015) 7.239 typ. (0.285) 7.620 0.254 (0.300 0.010) 4.064 typ (0.160) 0.813 0.102 (0.032 0.004) 8-0.800 dia. (8-0.031 dia.) 2.540 0.127 (0.100 0.005) 7.620 0.127 (0.300 0.005) 7.620 0.127 (0.300 0.005) 6.350 0.127 (0.250 0.005) 3.302 0.051 (0.130 0.002) pin 1 0.254 0.0127 (0.010 0.0005) dimensions mm (inches) pcb land pattern 2.540 0.127 (0.100 0.005) 9.652 0.381 (0.380 0.015) 6.350 0.127 (0.250 0.005) 9.525 0.254 (0.375 0.010) 0.457 0.076 (0.018 0.003) 0.813 0.102 (0.032 0.004) 4.445 0.127 (0.175 0.005) 7.620 0.254 (0.300 0.010) 0.635 0.127 (0.025 0.005) 0.254 0.0127 (0.010 0.0005) 2.54 (0.10) 8.90 (0.3503) 1.65 (0.0649) 0.65 (0.0255) 3.302 0.051 (0.130 0.002) pin 1
i ntegrated c ircuits d ivision CPC5001 r01 www.ixysic.com 9 5.5.3 CPC5001gs tape & reel information dimensions mm (inches) user direction of feed notes: 1. dimensions carry tolerances of eia standard 4 81-2 2. tape complies w ith all ? n otes? for constant dimensions listed on page 5 of eia-481-2 embossment emb ossed carrier top co v er tape thickness 0.102 max. (0.004 max.) 330.2 dia. (13.00 dia.) k 1 =4.20 (0.165) 0 k =4.90 (0.193) p=12.00 (0.472) w=16.00 (0.63) bo=10.30 (0.406) ao=10.30 (0.406) for additional information please vi sit our website at: www.ixysic.com ixys integrated circuits division makes no representations or wa rranties with respect to the a ccuracy or completeness of the co ntents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. neither circuit patent licenses nor indemnity ar e expressed or implied. except as set forth in ixys integrated circuits division?s standard terms and condit ions of sale, ixys integrated circuits division assumes no liability whatsoever, a nd disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringem ent of any intellectual property right. the products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of ixys integrated circuits division?s product may resul t in direct physical harm, injury, or death to a person or severe property or environmental damage. ixys integrated circuits divisi on reserves the right to discontinue or make changes to its pr oducts at any time without notice. specification: ds-CPC5001-r01 ?copyright 2013, ixys integrated circuits division all rights reserved. printed in usa. 7/30/2013
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