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sot23-6 (km4101) soic (km4101) features n 260mhz bandwidth n fully specified at +2.7v and +5v supplies n output voltage range: 0.036v to 4.953v; v s = +5; r l = 2k w n input voltage range: -0.3v to +3.8v; v s = +5 n 150v/ m s slew rate n 4.2ma supply current n power down to i s = 127 m a (km4101) n ?0ma linear output current n ?0ma output short circuit current n directly replaces ad8051 and lm7131 in single supply applications n small package options (sot-23, soic) applications n a/d driver n active filters n ccd imaging systems n cd/dvd rom n coaxial cable drivers n high capacitive load driver n portable/battery-power ed applications n twisted pair driver n v ideo driver general description the km4100 (single) and km4101 (single with disable) are low cost, voltage feedback amplifiers. these amplifiers are designed to operate on +2.7v, +5v, or 2.5v supplies. the input voltage range extends 300mv below the negative rail and 1.2v below the positive rail. the km4100 offers superior dynamic performance with a 260mhz small signal bandwidth and 150v/ m s slew rate. the combination of low power, high output current drive, and rail-to-rail performance make the km4100 well suited for battery-power ed communication/ computing systems. the combination of low cost and high performance make the km4100 suitable for high volume applications in both consumer and industrial applications such as wireless phones, scanners, and color copiers. km4100/km4101 low cost, +2.7v and +5v, 260mhz rail-to-rail amplifiers www.fairchildsemi.com rev . 1c mar ch 2005 km4100/km4101 packages sot23-5 (km4100) soic (km4100) - + 1 2 3 out -v s +in +v s -in 6 4 5 dis - + 1 2 3 out -v s +in +v s -in 5 4 - + 1 23 4 nc -in +in -v s dis +v s out nc 8 76 5 - + 1 23 4 nc -in +in -v s dis +v s out nc 8 76 5 output swing o u t p u t v o l t a g e ( 0 . 5 v / d i v ) t ime (0.5 ms/div) 2.7 0 v s = +2.7v r l = 2k w g = -1
data sheet km4100/km4101 2 rev . 1c mar ch 2005 parameters conditions typ min & max units notes case temperature +25 +25 frequency domain response -3db bandwidth g = +1, v o = 0.05v pp 215 mhz 1 g = +2, v o = 0.2v p p 85 mhz full power bandwidth g = +2, v o = 2v p p 36 mhz gain bandwidth product 86 mhz time domain response 1 rise and fall time 0.2v step 3.7 ns settling time to 0.1% 1v step 40 ns overshoot 0.2v step, 9 % slew rate 2.7v step , g = -1 140 v/ m s distortion and noise response 2nd harmonic distortion 1v p p , 5mhz 86 dbc 1 3rd harmonic distortion 1v p p , 5mhz 85 dbc 1 thd 1v pp , 5mhz 76 db 1 input voltage noise >1mhz 16 nv/ ? hz input current noise >1mhz 1.3 pa/ ? hz dc performance input offset voltage -1.6 ? mv 2 average drift 10 m v/ c input bias curr ent 3 8 m a 2 average drift 7 na/ c input of fset curr ent 0 1 m a 2 power supply r ejection ratio dc 57 52 db 2 open loop gain 75 65 db 2 quiescent curr ent 3.9 5 ma 2 quiescent curr ent (disabled) 58 100 m a 2 input characteristics input resistance 4.3 m w input capacitance 1.5 pf input common mode voltage range -0.3 to 1.5 v common mode rejection ratio dc, v cm = 0v to v s - 1.5 87 72 db 2 disable characteristics (km4101) turn on time 150 ns turn off time 25 ns off isolation 5mhz, r l = 100 w 75 db output characteristics output voltage swing r l = 10k w to v s /2 0.023 to 2.66 v r l = 2k w to v s /2 0.025 to 2.653 0.1 to 2.6 v2 r l = 150 w to v s /2 0.065 to 2.55 0.3 to 2.325 v 2 linear output current 60 ma -40 to +85? ?5 ma short circuit output current 90 ma power supply operating range 2.7 2.5 to 5.5 v min/max ratings are based on product characterization and simulation. individual parameters are tested as noted. outgoing quality levels are determined fr om tested parameters. notes: 1) r f = 1k w was used used for optimal performance. (for g = +1, r f = 0) 2) 100% tested at +25. absolute maximum ratings package thermal resistance supply voltage 0 to +6v package q q ja maximum junction temperature +175 5 lead sot23 256/w storage temperatur e range -65 to +150? 6 lead sot23 230/w lead temperature (10 sec) +300 8 lead soic 152/w operating temperature range (recommended) -40c to +85c input voltage range +v s +0.5v ; -v s -0.5v internal power dissipation see power derating curves km4100/km4101 electrical characteristics (v s = +2.7v, g = 2, r l = 2k w to v s /2; unless noted)
km4100/km4101 data sheet rev . 1c mar ch 2005 3 parameters conditions typ min & max units notes case temperature +25 +25 frequency domain response -3db bandwidth g = +1, v o = 0.05v pp 260 mhz 1 g = +2, v o = 0.2v p p 90 mhz full power bandwidth g = +2, v o = 2v p p 40 mhz gain bandwidth product 90 mhz time domain response 1 rise and fall time 0.2v step 3.6 ns settling time to 0.1% 2v step 40 ns overshoot 0.2v step, 7 % slew rate 5v step , g = -1 150 v/ m s distortion and noise response 2nd harmonic distortion 2v p p , 5mhz 70 dbc 1 3rd harmonic distortion 2v p p , 5mhz 78 dbc 1 thd 2v pp , 5mhz 68 db 1 input voltage noise >1mhz 16 nv/ ? hz input current noise >1mhz 1.3 pa/ ? hz dc performance input offset voltage 1.4 ? mv 2 average drift 10 m v/ c input bias curr ent 3 8 m a 2 average drift 7 na/ c input of fset curr ent 0 0.8 m a 2 power supply r ejection ratio dc 57 52 db 2 open loop gain 78 68 db 2 quiescent curr ent 4.2 5.2 ma 2 quiescent curr ent (disabled) 127 170 m a 2 input characteristics input resistance 4.3 m w input capacitance 1.5 pf input common mode voltage range -0.3 to 3.8 v common mode rejection ratio dc, v cm = 0v to v s - 1.5 87 72 db 2 disable characteristics (km4101) turn on time 150 ns turn off time 25 ns off isolation 5mhz, r l = 100 w 75 db output characteristics output voltage swing r l = 10k w to v s /2 0.027 to 4.97 v r l = 2k w to v s /2 0.036 to 4.953 0.1 to 4.9 v2 r l = 150 w to v s /2 0.12 to 4.8 0.3 to 4.625 v 2 linear output current 60 ma -40 to +85? ?5 ma short circuit output current 90 ma power supply operating range 5 2.5 to 5.5 v min/max ratings are based on product characterization and simulation. individual parameters are tested as noted. outgoing quality levels are determined fr om tested parameters. notes: 1) r f = 1k w was used used for optimal performance. (for g = +1, r f = 0) 2) 100% tested at +25. km4100/km4101 electrical characteristics (v s = +5v, g = 2, r l = 2k w to v s /2; unless noted)
4 rev . 1c mar ch 2005 km4100/km4101 performance characteristics (v s = +5v, g = 2, r f = 2k w , r l = 2k w to v s /2; unless noted) data sheet km4100/km4101 inverting freq. response v s = +5v n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0 .1 1 g = -10 r f = 2k w 10 100 g = -5 r f = 2k w g = -2 r f = 2k w g = -1 r f = 2k w input voltage noise v o l t a g e n o i s e ( n v / ? h z ) frequency (hz) 1k 10k 100k 1m 0 10 20 30 40 50 60 70 80 90 100 n on-inverting freq. response v s = +2.7 n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0.1 1 g = 10 r f = 2k w 10 100 g = 5 r f = 2k w g = 1 r f = 0 g = 2 r f = 1k w frequency response vs. temperature m a g n i t u d e ( 0 . 5 d b / d i v ) frequency (mhz) 1 10 100 large signal frequency response m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0.1 1 10 100 v o = 1v pp v o = 2v pp frequency response vs. c l m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0.1 1 10 100 c l = 100pf r s = 25 w c l = 50pf r s = 33 w c l = 20pf r s = 20 w c l = 10pf r s = 0 w + - 1k w 1k w r s c l r l non-inverting freq. response v s = +5v n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0 .1 1 g = 10 r f = 2k w 10 1 00 g = 5 r f = 2k w g = 1 r f = 0 g = 2 r f = 1k w i nverting freq. response v s = +2.7 n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 0.1 1 g = -10 r f = 2k w 10 100 g = -5 r f = 2k w g = -2 r f = 2k w g = -1 r f = 2k w
rev . 1c mar ch 2005 5 km4100/km4101 performance characteristics (v s = +5v, g = 2, r f = 2k w , r l = 2k w to v s /2; unless noted) km4100/km4101 data sheet open loop gain & phase vs. frequency o p e n l o o p g a i n ( d b ) frequency (mhz) -20 -10 0 10 20 -180 -135 -90 -45 0 30 40 50 60 70 80 0.01 0.1 1 10 100 p h a s e ( d e g r e e s ) |gain| phase psrr p s r r ( d b ) frequency (mhz) 1k 0.01 0.1 1 100 -70 -60 -50 -40 -30 -20 -10 0 10 output current o u t p u t v o l t a g e ( v ) output current (ma) -100 -50 0 50 100 linear output current +60ma -0.8 -0.6 -0.2 0 0.2 0.4 0.6 0.8 -0.4 short circuit current +90ma cmrr c m r r ( d b ) frequency (mhz) 0.01 0.1 1.0 10 100 -90 -80 -70 -60 -50 -40 2 nd & 3rd harmonic distortion; v s = +2.7v d i s t o r t i o n ( d b ) frequency (mhz) 0 5 10 15 2nd r l = 150 w 20 3 rd r l = 150 w 3rd r l = 2k w 2nd r l = 2k w -90 -80 -70 -60 -50 -40 -30 -20 v o = 1v pp r f = 1k w 3rd harmonic distortion vs. v o d i s t o r t i o n ( d b ) output amplitude (v pp ) 0.5 1.0 1.5 2.0 20mhz 10mhz 5mhz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 r f = 1k w 2nd harmonic distortion vs. v o d i s t o r t i o n ( d b ) output amplitude (v pp ) 0.5 1.0 1.5 2.0 2 0mhz 1 0mhz 5mhz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 r f = 1k w 2nd & 3rd harmonic distortion; v s = +5v d i s t o r t i o n ( d b ) f requency (mhz) 0 5 10 15 3rd r l = 150 w 20 2 nd r l = 150 w 3 rd r l = 2k w 2 nd r l = 2k w -90 -80 -70 -60 -50 -40 - 30 -20 v o = 2v pp r f = 1k w
6 rev . 1c mar ch 2005 km4100/km4101 performance characteristics (v s = +5v, g = 2, r f = 2k w , r l = 2k w to v s /2; unless noted) data sheet km4100/km4101 small signal pulse response v s = +2.7v o u t p u t v o l t a g e ( 0 . 0 5 v / d i v ) t ime (20ns/div) r f = 1k w output swing o u t p u t v o l t a g e ( 0 . 5 v / d i v ) t ime (0.5 ms/div) 2 .7 0 v s = +2.7v r l = 2k w g = -1 enable/disable response o u t p u t v o l t a g e ( 0 . 0 5 v / d i v ) time (2 ms/div) disable pulse 5v 0v output v in = 0.2v pp sinusoid with 0.1v offset cmir o u t p u t v o l t a g e ( 4 m v / d i v ) cmir (1v/div) -1 0 4 5 0 123 small signal pulse response v s = +5v o u t p u t v o l t a g e ( 0 . 0 5 v / d i v ) t ime (20ns/div) r f = 1k w large signal pulse response v s = +5v o u t p u t v o l t a g e ( 0 . 5 v / d i v ) time (20ns/div) r f = 1k w
rev . 1c mar ch 2005 7 g eneral description the km4100/km4101 are single supply, general purpose, voltage-feedback amplifiers fabricated on a complementary bipolar process using a patent pending topology. they feature a rail-to-rail output stage and are u nity gain stable. both gain bandwidth and slew rate are insensitive to temperature. the common mode input range extends to 300mv below ground and to 1.2v below v s . exceeding these values will not cause phase reversal. however, if the input volt- age exceeds the rails by more than 0.5v, the input esd devices will begin to conduct. the output will stay at the rail during this overdrive condition. the design uses a darlington output stage. the output stage is short circuit protected and offers oft? saturation protection that improves recovery time. the typical circuit schematic is shown in figure 1. figure 1: typical configuration at non-inverting gains other than g = +1, keep r g below 1k w to minimize peaking; thus, for optimum r esponse at a gain of +2, a feedback resistor of 1k w is recommended. figur e 2 illustrates the km4100/km4101 frequency r esponse with both 1k w and 2k w feedback r esistors. enable/disable function (km4101) the km4101 offers an active-low disable pin that can be used to lower its supply curr ent. leave the pin floating to enable the part. pull the disable pin to the negative supply (which is ground in a single supply application) to disable the output. during the disable condition, the nominal supply current will drop to below 127 m a and the output will be at high impedance with about 2pf capaci- tance. figure 2: frequency response vs. r f power dissipation the maximum inter nal power dissipation allowed is directly related to the maximum junction temperature. if the maximum junction temperatur e exceeds 150, some r eliability degradation will occur. if the maximum junction temperature exceeds 175 for an extended time, device failur e may occur . the km4100/km4101 ar e short circuit protected. however, this may not guarantee that the maximum junc- tion temperatur e (+150 c) is not exceeded under all con- ditions. follow the maximum power derating curves shown in figur e 3 to ensur e pr oper operation. figure 3: power derating curves over drive recovery for an amplifier , an over drive condition occurs when the output and/or input ranges are exceeded. the recovery time varies based on whether the input or output is over - driven and by how much the ranges ar e exceeded. the km4100/km4101 will typically recover in less than 20ns fr om an over drive condition. figur e 4 shows the km4100 in an over driven condition. km4100/km4101 data sheet maximum power dissipation m a x i m u m p o w e r d i s s i p a t i o n ( w ) ambient temperature ( c) -50 -30 -10 10 30 50 70 90 soic-8 lead 0 0.5 1.0 1.5 2.0 sot23-6 lead sot23-5 lead + - km4100 r f 0.01 mf 6.8 m f out in +v s + r g r1 2 r out r1 1 r2 frequency reponse vs. r f m a g n i t u d e ( 1 d b / d i v ) frequency (mhz) 1 10 1 00 r f = 2k w r f = 1k w g = 2 r l = 2k w v s = +5v
8 rev . 1c mar ch 2005 figure 4: overdrive recovery driving capacitive loads the fr equency response vs. c l plot on page 4, illustrates the response of the km4100 and km4101. a small series resistance (r s ) at the output of the amplifier, illustrated in figur e 5, will improve stability and settling performance. r s values in the frequency response vs. c l plot were chosen to achieve maximum bandwidth with less than 1db of peaking. for maximum flatness, use a larger r s . figure 5: typical topology for driving a capacitive load layout considerations general layout and supply bypassing play major r oles in high fr equency performance. fair child has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. follow the steps below as a basis for high fr equency layout: n include 6.8 m f and 0.01 m f ceramic capacitors n place the 6.8 m f capacitor within 0.75 inches of the power pin n place the 0.01 m f capacitor within 0.1 inches of the power pin n remove the ground plane under and around the part, especially near the input and output pins tor educe parasitic capacitance n minimize all trace lengths to reduce series inductances refer to the evaluation board layouts shown in figure 7 for more information. evaluation board information t he following evaluation boards are available to aid in the testing and layout of this device: evaluation board schematics and layouts are shown in figure 6 and figure 7. the keb002 and keb003 evaluation boards are built for dual supply operation. follow these steps to use the board in a single supply application: 1. short -v s to ground 2. use c3 and c4, if the -v s pin of the km4100 or km4101 is not directly connected to the ground plane. figure 6: evaluation board schematic (soic pinout shown) e val board description products keb002 single channel, km4100it5, d ual supply 5 & 6 lead sot23 km4101it6 keb003 single channel, dual supply km4100ic8, 8 lead soic km4101ic8 data sheet km4100/km4101 overdrive recovery i n p u t v o l t a g e ( 0 . 5 v / d i v ) t ime (20ns/div) output input r l = 2k w v in =2v pp g = 5 r f = 1k w + - r f r g r s c l r l
km4100/km4101 evaluation board layout km4100/km4101 data sheet rev . 1c mar ch 2005 9 figure 7a: keb002 (top side) figure 7b: keb002 (bottom side) figure 7c: keb003 (top side) figure 7d: keb003 (bottom side)
data sheet km4100/km4101 10 rev . 1c mar ch 2005 sot23-5 sot23-6 soic km4100/km4101 package dimensions h e c l zd c l e d pin n o. 1 b a a1 a2 7 l de tail-a de tail-a c h x 45 a n ote: 1 . a l l dimensions are in millimeters. 2 . l e ad coplanarity should be 0 to 0.10mm (.004") max. 3. pa ckage sur face finishing: (2.1) top: matte (cha rmilles #18~30). (2.2) all sides: matte (cha rmilles #18~30). (2.3) bottom: smooth or matte (cha rmilles #18~30). 4 . a ll dimensions excluding mold flashes and end flash from the pa ckage body shall not exceed 0.152mm (.006) per side (d). symbol min m a x a 1 0.10 0.25 b 0.36 0.46 c 0.19 0.25 d 4.80 4 . 9 8 e 3.81 3.99 e 1.27 bsc h 5.80 6.20 h 0.25 0.50 l 0.41 1.27 a 1.52 1.72 0 z d 0 .53 ref a 2 1 . 3 7 1.57 8 soic-8 b e e1 d c l e c l c l a a2 a 1 a e1 c 2 d a t u m ' a ' c l n ote: 1. all dimensions are in millimeters. 2 foot length measured reference to flat foot surface parallel to datum 'a' and lead surface. 3. package outline exclusive of mold flash & metal burr. 4. package outline inclusive of solder plating. 5. comply to eiaj sc74a. 6. package st 0003 rev a supercedes sot-d-2005 rev c. symbol min max a 0.90 1.45 a1 0.00 0.15 a2 0.90 1.30 b 0.25 0.50 c 0.09 0.20 d 2.80 3.10 e 2.60 3.00 e1 1.50 1.75 l 0.35 0.55 e 0.95 ref e1 1.90 ref a 0 10 b e e1 d c l e c l c l a a2 a1 a e1 c 2 d a t u m ' a ' c l note: 1. all dimensions are in millimeters. 2 foot length measured reference to flat foot surface parallel to datum 'a' and lead surface. 3. package outline exclusive of mold flash & metal burr. 4. package outline inclusive of solder plating. 5. comply to eiaj sc74a. 6. package st 0004 rev a supercedes sot-d-2006 rev c. symbol min max a 0.90 1.45 a1 0.00 0.15 a2 0.90 1.30 b 0.25 0.50 c 0.09 0.20 d 2.80 3.10 e 2.60 3.00 e1 1.50 1.75 l 0.35 0.55 e 0.95 ref e1 1.90 ref a 0 10
d d i i s s c c l l a a i i m m e e r r f airchild semiconductor reser ves the right to make changes without fur ther notices to any products herein to improve reliability , function or design. f airchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. l l i i f f e e s s u u p p p p o o r r t t p p o o l l i i c c y y fairchild products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of f airchild semiconductor corpora tion. as used herein: 1. life support devices or systems ar e devices or systems which, (a) ar e intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to per- form when properly used in accordance with instructions for use provided in the label- ing, can be r easonably expected to r esult in a significant injury of the user . 2. a critical component in any component of a life support device or system whose failur e to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www .fair childsemi.com ?2005 fairchild semiconductor corporation ordering information model part number lead-free package container pack qty km4100 km4100ic8tr3 no soic-8 reel 3000 km4100 km4100it5tr3 no sot23-5 reel 2500 k m4100 km4100it5tr3_nl yes sot23-5 reel 2500 km4101 km4101it6tr3 no sot23-6 reel 2500 temperature range for all parts: -40 to +85? km4100/km4101 data sheet

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