1 n-channel 30-v (d-s) mosfet features ? halogen-free ? trenchfet ? power mosfet ? o p timized for high-side synchronous rectifier operation ? 100 % r g tested ? 100 % uis tested applications ? notebook cpu core - high-side switch product summa ry v ds (v) r ds(on) ( ) i d (a) a q g (typ .) 30 0.007 at v gs = 10 v 15 6 .8 nc 0.009 at v gs = 4.5 v 13 so-8 sd sd sd gd 5 6 7 8 t op view 2 3 4 1 n-channel mosfet g d s notes: a. base on t c = 25 c. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. maximum under steady state conditions is 8 5 c/w. absolute maximum ratings t a = 25 c , unless otherwise noted paramet e r symbol limit u nit dr ain-source voltage v ds 30 v gate-source v o ltage v gs 20 continuous dr ain current (t j = 150 c) t c = 25 c i d 15 a t c = 70 c 12 t a = 25 c 11 b, c t a = 70 c 9 b, c pulsed drain cu rrent i dm 50 continuous source-dr ain diode current t c = 25 c i s 3.8 t a = 25 c 2.1 b, c single pulse avalanche current l = 0.1 mh i as 22 avalanche energ y e as 24 mj max im u m power dissipation t c = 25 c p d 4.5 w t c = 70 c 2.8 t a = 25 c 2.5 b, c t a = 70 c 1.6 b, c ope r ating j unction and storage temperature range t j , t stg - 55 to 150 c thermal resist ance rat i ngs pa rameter sym b ol typical maximum u nit maxim um junction-to-ambient b, d t 10 s r thja 38 50 c/w maximum junction-to-f oot (drain) steady state r thjf 22 28 www.din-tek.jp dt m44 20 b
2 note s : a. p ulse test; pulse width d 300 s, duty cycle d 2 %. b. guaranteed by design, not s ubject to production testing. stresses b e yond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications t j = 25 c , unless otherwise noted parame te r sy mbol test conditions min. typ. max. unit static drai n-source breakdo wn voltage v ds v gs = 0 v , i d = 2 50 a 30 v v ds temperature coefficient ' v ds /t j i d = 2 50 a 28 mv/c v gs(th) t emper ature coefficient ' v gs(t h) /t j - 6 gate-s ource thresho l d voltage v gs(th) v ds = v gs , i d = 250 a 1.2 2.5 v gate-s ource leakage i gss v ds = 0 v, v gs = 20 v 10 0 n a z ero gate voltage drain current i dss v ds = 30 v, v gs = 0 v 1 a v ds = 30 v, v gs = 0 v , t j = 55 c 10 on-state dr ain current a i d(on) v ds t 5 v, v gs = 10 v 20 a dra i n-source on-state resistance a r ds(on) v gs = 10 v, i d = 11 a 0.005 0.007 : v gs = 4.5 v, i d = 10 a 0.007 0.009 f orw ard transconductance a g fs v ds = 1 5 v , i d = 1 1 a 52 s dy nam i c b input capacitan ce c iss v ds = 15 v, v gs = 0 v, f = 1 mhz 820 pf output capacitance c oss 195 reverse t r ansfer capacitance c rss 73 total gate charge q g v ds = 15 v, v gs = 10 v, i d = 11 a 15 23 nc v ds = 15 v, v gs = 5 v, i d = 11 a 6.8 10.2 gate-s o urce charge q gs 2.5 gate-dra in charge q gd 2.3 gate re si stance r g f = 1 mhz 0.36 1.8 3 .6 : tu r n - o n d e l ay t i m e t d( on) v dd = 15 v, r l = 1.4 : i d # 9 a, v gen = 4.5 v, r g = 1 : 16 24 ns rise time t r 12 18 turn -off delay time t d(off) 16 24 fall time t f 10 20 tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 1.4 : i d # 9 a, v gen = 10 v , r g = 1 : 816 rise time t r 10 20 tur n -off delay time t d(off) 16 24 fal l time t f 815 drain-so ur ce body diode characteristics continuous source-drain diode current i s t c = 25 c 25 a pulse diod e f orward current a i sm 50 body diode voltage v sd i s = 9 a 0.8 1.2 v body diode re verse recovery time t rr i f = 9 a, di/dt = 100 a/s , t j = 25 c 15 30 ns body diode reverse recovery charge q rr 612n c re verse recovery fall time t a 8 ns re verse reco v ery rise time t b 7 z z z g l q w h n m s ' 7 0 %
3 typica l c har ac teristics 25 c, unless otherwise noted output c h aracteristics on-resistance vs. drain current and gate voltage gate charge 0 10 20 30 40 50 0246 8 10 v gs =10th r u 4 v v gs =3 v v ds - drain - to -so u rce v oltage ( v ) - drain c u rrent (a) i d 0.005 0.007 0.009 0.011 0.013 0.015 0 102 03 04050 v gs =4.5 v v gs =10 v - on-r esistance ( ) r ds(on) i d - drain c u rrent (a) 0 2 4 6 8 10 04 8 12 16 v ds = 24 v i d = 11 a v ds =15 v - gate-t o -so u rce v oltage ( v ) q g - t otal gate charge (nc) v gs tra n sfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t c = 25 c t c = 125 c t c =- 55 c v gs - gate - to-so u rce v oltage ( v ) - drain c u rrent (a) i d c rss 0 300 600 900 1200 0 6 12 1 8 24 30 c iss c oss v ds - drain-to -so u rce v oltage ( v ) c - capacitance (pf) 0.6 0.9 1.2 1.5 1. 8 - 50 - 25 0 25 50 75 100 125 150 v gs =4.5 v v gs =1 0 v i d = 11 a t j -j u nction temperat u re (c) ( n ormalized) - on-r esistance r ds(on) www.din-tek.jp dt m44 20 b
4 ty pi cal ch ara cteristics 25 c, unless otherwise noted source-drain diode for ward voltage threshold voltage 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 1 0.01 0.001 0.1 10 100 t j = 150 c t j = 25 c v sd -so u rce - to-drain v oltage ( v ) - so u rce c u rrent (a) i s 1.0 1.2 1.4 1.6 1. 8 2.0 2.2 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a ( v ) v gs(th) t j - t emperat u re (c) on-resistance vs. gate-to-so urce voltage single pulse power, junction-to-ambient 0.000 0.005 0.010 0.015 0.020 0.025 0.030 0246 8 10 t j =25 c t j = 125 c - on-r esistance ( ) r ds(on) v gs - gate - to-so u rce v oltage ( v ) 0 50 10 pow er (w) time (s) 20 1 100 600 10 10 -1 10 -2 10 -3 30 40 safe opera t ing area, junction-to-ambient 100 1 0.1 1 10 100 0.01 10 0.1 t a =25 c single p u lse 100 a 1s 10 s limited b yr ds(on) * b v dss limited 1ms 10 ms 100 ms dc v ds - drain- to -so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified - drain c u rrent (a) i d www.din-tek.jp dt m44 20 b
5 typica l c har ac teristics 25 c, unless otherwise noted * t he power dissipat ion p d is based on t j(max ) = 150 c , using junctio n-to-case thermal resi stance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 3 6 9 12 15 1 8 0 25 50 75 100 125 150 t c - case t emperat u re (c) i d - drain c u rrent (a) power derat i ng, junction-to-foot 0 1 2 3 4 5 6 0 25 50 75 100 125 150 t c - case t emperat u re (c) po w er ( w ) power d e rating, junction-to-ambient 0.0 0.5 1.0 1.5 2.0 0 25 50 75 100 125 150 t a -am b ient t emperat u re (c) po w er ( w ) www.din-tek.jp dt m44 20 b
6 ty pi cal ch ara cteristics 25 c, unless otherwise noted normalized th erma l transient im pedance, junction-to-ambient 10 -3 10 -2 1 1 0 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse dur ation (s) normalized ef f ectiv e t ransient thermal impedance 1. duty cycle , d = 2. per unit base = r th j a = 70 c/w 3. t jm - t a = p dm z th j a (t ) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized ther mal transient impedance, junction-to-foot 10 -3 10 -2 11 0 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square w av e pulse dur ation (s) normalized ef f ective transient thermal impedance www.din-tek.jp dt m44 20 b
1 di m millimeter s inc hes min ma x min max a 1 .35 1.7 5 0.053 0.069 a 1 0 .10 0.2 0 0.004 0.008 b 0.35 0.51 0.014 0.020 c 0.19 0.25 0.0075 0.010 d 4.80 5.00 0.189 0.196 e 3.80 4.00 0.150 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 l 0.50 0.93 0.020 0.037 q0 8 0 8 s 0.44 0.64 0.018 0.026 ecn: c-06527-rev. i, 11-sep-06 dwg: 5498 4 3 1 2 5 6 8 7 h e h x 45 c all lea d s q 0.101 mm 0.004" l ba 1 a e d 0.25 mm (ga ge pla ne) soic (narrow): 8-lead jedec p a rt n u m b er: ms -012 s package information www.din-tek.jp
1 appl ication note r ecommended minimum pads for so-8 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.172 (4.369) 0.152 (3.861) 0.047 (1.194) 0.028 (0.71 1) 0.050 (1.270) 0.022 (0.559) return to index r eturn to inde x application note www.din-tek.jp
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