vishay siliconix SI8469DB document number: 67091 s10-2539-rev. a, 08-nov-10 www.vishay.com 1 p-channel 8 v (d-s) mosfet features ? halogen-free according to iec 61249-2-21 definition ? trenchfet ? power mosfet ? ultra-small 1 mm x 1 mm maximum outline ? ultra-thin 0.548 mm maximum height ? compliant to rohs directive 2002/95/ec applications ? load switches, battery switches and charger switches in portable device applications ? load switch for 1.2 v power line product summary v ds (v) r ds(on) ( ? ) i d (a) a, e q g (typ.) - 8 0.064 at v gs = - 4.5 v - 4.6 6.9 nc 0.076 at v gs = - 2.5 v - 4.2 0.115 at v gs = - 1.5 v - 3.4 0.180 at v gs = - 1.2 v - 1.2 notes: a. surface mounted on 1" x 1" fr4 board with full copper, t = 10 s. b. surface mounted on 1" x 1" fr4 board with minimum copper, t = 10 s. c. refer to ipc/jedec (j-std-020c), no manual or hand soldering. d. in this document, any reference to case represents t he body of the micro foot device and foot is the bump. e. based on t a = 25 c. micro foot device markin g : 8 469 xxx = date/lot tracea b ility code orderin g information: si 8 469db-t2-e1 (lead (p b )-free and halogen-free) b u mp side v ie w backside v ie w xxx 8 469 s d g s 1 2 4 3 s g d p-channel mosfet absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds - 8 v gate-source voltage v gs 5 continuous drain current (t j = 150 c) t a = 25 c i d - 4.6 a a t a = 70 c - 3.7 a t a = 25 c - 3.6 b t a = 70 c - 2.8 b pulsed drain current i dm - 15 continuous source-drain diode current t a = 25 c i s - 1.4 a t a = 25 c - 0.6 b maximum power dissipation t a = 25 c p d 1.8 a w t a = 70 c 1.1 a t a = 25 c 0.78 b t a = 70 c 0.5 b operating junction and storage temperature range t j , t stg - 55 to 150 c package reflow conditions c vpr 260 ir/convection 260
www.vishay.com 2 document number: 67091 s10-2539-rev. a, 08-nov-10 vishay siliconix SI8469DB notes: a. surface mounted on 1" x 1" fr4 board with full copper. b. maximum under steady stat e conditions is 100 c/w. c. surface mounted on 1" x 1" fr4 board with minimum copper. d. maximum under steady stat e conditions is 190 c/w. notes: a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a, b t = 10 s r thja 55 70 c/w maximum junction-to-ambient c, d t = 10 s 125 160 specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 250 a - 8 v v ds temperature coefficient ? v ds /t j i d = - 250 a - 6.4 mv/c v gs(th) temperature coefficient ? v gs(th) /t j 2.4 gate-source threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 0.35 - 0.8 v gate-source leakage i gss v ds = 0 v, v gs = 5 v 100 na zero gate voltage drain current i dss v ds = - 8 v, v gs = 0 v - 1 a v ds = - 8 v, v gs = 0 v, t j = 70 c - 10 on-state drain current a i d(on) v ds ?? - 5 v, v gs = - 4.5 v - 10 a drain-source on-state resistance a r ds(on) v gs = - 4.5 v, i d = - 1.5 a 0.052 0.064 ? v gs = - 2.5 v, i d = - 1 a 0.062 0.076 v gs = - 1.5 v, i d = - 0.3 a 0.085 0.115 v gs = - 1.2 v, i d = - 0.3 a 0.110 0.180 forward transconductance a g fs v ds = - 4 v, i d = - 1.5 a 12 s dynamic b input capacitance c iss v ds = - 4 v, v gs = 0 v, f = 1 mhz 900 pf output capacitance c oss 315 reverse transfer capacitance c rss 260 total gate charge q g v ds = - 4 v, v gs = - 4.5 v, i d = - 1.5 a 11 17 nc gate-source charge q gs 0.85 gate-drain charge q gd 2.5 gate resistance r g v gs = - 0.1 v, f = 1 mhz 6 ? tu r n - o n d e l ay t i m e t d(on) v dd = - 4 v, r l = 2.7 ? i d ? - 1.5 a, v gen = - 4.5 v, r g = 1 ? 15 30 ns rise time t r 22 45 turn-off delay time t d(off) 35 70 fall time t f 17 35 drain-source body diode characteristics continuous source-drain diode current i s t a = 25 c - 1.5 a pulse diode forward current i sm - 15 body diode voltage v sd i s = - 1.5 a, v gs = 0 v - 0.9 - 1.3 v body diode reverse recovery time t rr i f = - 1.5 a, di/dt = 100 a/s, t j = 25 c 25 50 ns body diode reverse recovery charge q rr 10 20 nc reverse recovery fall time t a 10 ns reverse recovery rise time t b 15
document number: 67091 s10-2539-rev. a, 08-nov-10 www.vishay.com 3 vishay siliconix SI8469DB typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current and gate voltage gate charge 0 3 6 9 12 15 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs =5vthru2v v gs =1v v gs =0.5v v gs =1.5v v ds - drain-to-source voltage (v) i d - drain current (a) 0.00 0.04 0.08 0.12 0.16 0.20 03691215 v gs =2.5v v gs =1.5v v gs =1.2v v gs =4.5v r ds(on) - on-resistance ( ) i d - drain current (a) 0 1 2 3 4 5 6 03691215 i d =1.5a v ds =4v v ds =6.4v v ds =2v q g - total gate charge (nc) v gs - gate-to-source voltage (v) transfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 0.0 0.3 0.6 0.9 1.2 1.5 t c = 125 c t c = 25 c t c = - 55 c v gs - gate-to-source voltage (v) i d - drain current (a) c rss 0 300 600 900 1200 1500 02468 c iss c oss v ds - drain-to-source voltage (v) c - capacitance (pf) 0.8 0.9 1.0 1.1 1.2 1.3 - 50 - 25 0 25 50 75 100 125 150 v gs =1.2v,0.3a v gs =1.5v;i d =0.3a v gs =2.5v;4.5v;i d =1.5a t j - junction temperature (c) (normalized) r ds(on) - on-resistance
www.vishay.com 4 document number: 67091 s10-2539-rev. a, 08-nov-10 vishay siliconix SI8469DB typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage threshold voltage 0.1 1 10 100 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 t j = 25 c t j = 150 c v sd - source-to-drain voltage (v) i s - source current (a) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a v gs(th) (v) t j - temperature (c) on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.00 0.04 0.08 0.12 0.16 012345 t j = 25 c t j = 125 c i d =1.5a r ds(on) - on-resistance ( ) v gs - gate-to-source voltage (v) 0 5 10 15 20 25 power (w) time (s) 10 1000 0.1 0.01 0.001 100 1 safe operating area, junction-to-ambient 0.1 100 1 10 0.01 0.1 100 s 10 ms 1 10 t a = 25 c single pulse 1ms bvdss limited limited by r ds(on) * dc 1s,10s 100 ms v ds - drain-to-source voltage (v) * v gs > minimum v gs at which r ds(on) is specified i d - drain current (a)
document number: 67091 s10-2539-rev. a, 08-nov-10 www.vishay.com 5 vishay siliconix SI8469DB typical characteristics (25 c, unless otherwise noted) note: when mounted on 1" x 1" fr4 with full copper. * the power dissipation p d is based on t j(max) = 150 c, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 1 2 3 4 5 0 25 50 75 100 125 150 t a - ambient temperature (c) i d - drain current (a) power derating 0.0 0.3 0.6 0.9 1.2 1.5 25 50 75 100 125 150 t a - ambient temperature (c) power dissipation (w)
www.vishay.com 6 document number: 67091 s10-2539-rev. a, 08-nov-10 vishay siliconix SI8469DB typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient (1" x 1" fr4 board with full copper) 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 square wave pulse duration (s) normalized effective transient thermal impedance 1 0.1 0.01 t 1 t 2 notes: p dm 1. duty cycle, d = 2. per unit base = r thja =100 c/w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. surface mounted duty cycle = 0.5 single pulse 0.02 0.05 normalized thermal transient impedance, junction-t o-ambient (1 1 fr4 board with minimum copper) 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 square wave pulse duration (s) normalized effective transient thermal impedance 1 0.1 0.01 t 1 t 2 notes: p dm 1. duty cycle, d = 2. per unit base = r thja =190 c/w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. surface mounted duty cycle = 0.5 single pulse 0.02 0.05
document number: 67091 s10-2539-rev. a, 08-nov-10 www.vishay.com 7 vishay siliconix SI8469DB package outline micro foot: 4-bump (2 x 2, 0.5 mm pitch) notes (unless otherwise specified): 1. all dimensions are in millimeters. 2. four (4) solder bumps are lead (pb) -free 95.5sn/3.8ag/0.7cu with diameter ?? 0.30 mm to 0.32 mm. 3. backside surface is coated with a ti/ni/ag layer. 4. non-solder mask defined copper landing pad. 5. ? ? is location of pin 1. notes: a. use millimeters as the primary measurement. vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?67091 . s d g s xxx 8 469 e d s a2 a1 a s e d 4 x ? b 2 1 4 3 recommended land e mark on backside of die 4 x ? 0.24 to 0.26 n ote 4 solder mask ~ ? 0.25 b u mp n ote 2 dim. millimeters a inches min. nom. max. min. nom. max. a 0.462 0.505 0.548 0.0181 0.0198 0.0215 a 1 0.220 0.250 0.280 0.0086 0.0098 0.0110 a 2 0.242 0.255 0.268 0.0095 0.0100 0.0105 b 0.300 0.310 0.320 0.0118 0.0122 0.0126 e 0.500 0.0197 s 0.230 0.250 0.270 0.0090 0.0098 0.0106 d 0.920 0.960 1.000 0.0362 0.0378 0.0394
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