symbol v ds v gs i dm i av e av t j , t stg symbol typ max 23 40 48 65 r q jl 12 16 mj w junction and storage temperature range a p d c 3 2.1 -55 to 150 t a =70c i d continuous drain current af maximum units parameter t a =25c t a =70c 30 a maximum junction-to-ambient a steady-state 11.5 9.6 80 avalanche current b 25 repetitive avalanche energy b l=0.3mh 94 c/w absolute maximum ratings t a =25c unless otherwise noted vv 12 pulsed drain current b power dissipation t a =25c gate-source voltage drain-source voltage maximum junction-to-lead c steady-state c/w thermal characteristics parameter units maximum junction-to-ambient af t 10s r q ja c/w AO4406 n-channel enhancement mode field effect transistor features v ds (v) = 30v i d = 11.5a (v gs = 10v) r ds(on) < 14m w (v gs = 10v) r ds(on) < 16.5m w (v gs = 4.5v) r ds(on) < 26m w (v gs = 2.5v) uis tested! rg,ciss,coss,crss tested general description the AO4406/l uses advanced trench technology to provide excellent r ds(on) , low gate charge and operation with gate voltages as low as 2.5v. this device makes an excellent high side switch for notebook cpu core dc-dc conversion. AO4406 and AO4406l are electrically identical. -rohs compliant -AO4406l is halogen free soic-8 g s s s d d d d g ds alpha & omega semiconductor, ltd. www.aosmd.com
AO4406 symbol min typ max units bv dss 30 v 1 t j =55c 5 i gss 100 na v gs(th) 0.8 1 1.5 v i d(on) 60 a 11.5 14 t j =125c 16 19.2 13.5 16.5 m w 19.5 26 m w g fs 25 38 s v sd 0.83 1 v i s 4.5 a c iss 1630 2300 pf c oss 201 pf c rss 142 200 pf r g 0.4 0.8 1.8 w q g 13.5 18 24 nc q gs 2.5 nc q gd 5.5 nc t d(on) 4 6 ns t r 5 7.5 ns t d(off) 32 50 ns t f 5 10 ns t rr 18.7 24 ns q rr 12.5 15 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters v gs =0v, v ds =15v, f=1mhz gate drain charge turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.2 w , r gen =3 w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time switching parameters total gate charge v gs =4.5v, v ds =15v, i d =11.5a gate source charge m w v gs =4.5v, i d =10a i s =10a,v gs =0v v ds =5v, i d =10a v gs =2.5v, i d =8a r ds(on) static drain-source on-resistance forward transconductance diode forward voltage i dss m a gate threshold voltage v ds =v gs i d =250 m a v ds =30v, v gs =0v v ds =0v, v gs = 12v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time body diode reverse recovery charge i f =10a, di/dt=100a/ m s drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =4.5v, v ds =5v v gs =10v, i d =12a reverse transfer capacitance i f =10a, di/dt=100a/ m s a: the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the value in any given application depends on the user's specific board design. b: repetitive rating, pulse width limited by juncti on temperature. c. the r q ja is the sum of the thermal impedence from junction to lead r q jl and lead to ambient. d. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. e. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a stil l air environment with t a =25c. the soa curve provides a single pulse rating. f. the current rating is based on the t 10s junction to ambient thermal resistance rating. rev9: may 2011 alpha & omega semiconductor, ltd. www.aosmd.com
AO4406 typical electrical and thermal characteristics 0 10 20 30 40 50 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics i d (a) v gs =1.5v 2v 2.5v 3v 4.5v 10v 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 v gs (volts) figure 2: transfer characteristics i d (a) 0 5 10 15 20 25 30 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =2.5v v gs =10v v gs =4.5v 0 10 20 30 40 0.00 2.00 4.00 6.00 8.00 10.00 v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m w ww w ) 25c 125c v ds =5v v gs =2.5v v gs =4.5v v gs =10v i d =10a 25c 125c i d =10a v gs =0v alpha & omega semiconductor, ltd. www.aosmd.com
AO4406 typical electrical and thermal characteristics 0 1 2 3 4 5 0 4 8 12 16 20 24 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note e) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal imp edance z q qq q ja normalized transient thermal resistance c oss c rss 0.1 1.0 10.0 100.0 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note e) 100 m s 10ms 1ms 0.1s 1s 10s dc r ds(on) limited t j(max) =150c t a =25c v ds =15v i d =11.5a single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =65c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t a =25c 10 m s alpha & omega semiconductor, ltd. www.aosmd.com
AO4406 typical electrical and thermal characteristics 0 10 20 30 40 50 60 70 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: avalanche capability i d (a), peak avalanche current 0 1 2 3 4 25 50 75 100 125 150 t case (c) figure 13: power de-rating (note a) power dissipation (w) steady- state 10s t a =25c dd d a v bv i l t - = alpha & omega semiconductor, ltd. www.aosmd.com
AO4406 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% res istive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt t rr ar ar alpha & omega semiconductor, ltd. www.aosmd.com
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