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  issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 1 version2.0 tft lcd approval specification model no.:V315H1-PH2 tv product marketing & management div. approved by chao-chun chung qra dept. product development div. reviewed by hsin-nan chen wt lin lcd tv marketing and product management div. prepared by josh chi cindy_yang customer: approved by: note: www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 2 version2.0 - contents - revision history --------------------------------------------------- ---- 3 1. general description --------------------------------------------------- ---- 4 1.1 overview 1.2 characteristics 1.3 mechanical specifications 2. absolute maximum ratings --------------------------------------------------- ---- 5 2.1 absolute ratings of environment (base on cmo mo dule v546h1-ph3) 2.2 absolute ratings of environment (open cell) 2.3 electrical absolute ratings (open cell) 3. electrical characteristics --------------------------------------------------- ---- 7 3.1 tft lcd open cell 3.2 rsds characteristics 4. block diagram --------------------------------------------------- ---- 10 4.1 tft lcd open cell 5. input terminal pin assignment --------------------------------------------------- ---- 11 5.1 tft lcd module 5.2 color data input assignment 6. interface timing --------------------------------------------------- ---- 17 6.1 input signal timing specifications 6.2 power on/off sequence 7. optical characteristics --------------------------------------------------- ---- 21 7.1 test conditions 7.2 optical specifications 8. definition of labels --------------------------------------------------- ---- 24 8.1 open cell label 8.2 carton label 9. packaging - ----------------------------------------------- 25 9.1 packing specifications 9.2 packing method 10. precautions --------------------------------------------------- ---- 27 10.1 assembly and handling precautions 10.2 safety precautions 11. mechanical drawing --------------------------------------------------- ---- 28 www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 3 version2.0 revision history version date page (new) section description ver 2.0 nov.10, 2009 all all approval specification was first issued. www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 4 version2.0 1. general description 1.1 overview V315H1-PH2 is a 31.5 tft liquid crystal display module. this module supports 1920* 1080 hdtv format and can display 1.07g colors (8-bit+hi-frc/color). 1.2 characteristics characteristics items specifications screen diagonal [in] 31.51 pixels [lines] 1920*1080 active area [mm] 698.4 (h) x 392.85 (v) (31.51 d iagonal) sub -pixel pitch [mm] 0.12125 (h) x 0.36375 (v) pixel arrangement rgb vertical stripe weight [g] 1200 physical size [mm] 716.1(w) x 410(h) x 1.79(d) typ . display mode transmissive mode / normally black contrast ratio 4000:1 typ. (typical value measured at cmos module) glass thickness (array/cf) [mm] 0.7 / 0.7 viewing angle (cr>20) +88/-88(h),+88/-88(v) typ. (typical value measured at cmos module) color chromaticity r=(0.638, 0.323) g=(0.288, 0.605) b=(0.146, 0.055) w=(0.280, 0.290) (typical value measured at cmos module) cell transparency [ ] 4.0%typ.. (typical value measured at cmos module) polarizer (cf side) super wide view glare & hard coating (3h) 709.7(w) x 405(h).. polarizer (tft side) super wide view, 709.7(w) x 40 5(h).. 1.3 mechanical specifications item min. typ. max. unit note weight 1099 1199 1299 g - i/f connector mounting position the mounting inclination of the connector makes the screen center within 0.5mm as the horizontal. (2) note (1) please refer to the attached drawings for more information of front and back outline dimensio ns. (2) connector mounting position +/- 0.5mm www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 5 version2.0 2. absolute maximum ratings 2.1 absolute ratings of environment (based on cmo m odule v546h1-ph3) value item symbol min. max. unit note storage temperature t st -20 +60 oc (1), (3) operating ambient temperature t op 0 50 oc (1), (2), (3) altitude operating a op 0 5000 m (3) altitude storage a st 0 12000 m (3) note (1) temperature and relative humidity range is shown in the figure below. (a) 90 %rh max. (ta Q 40 oc). (b) wet-bulb temperature should be 39 oc max. (ta > 40 oc). (c) no condensation.. note (2) the maximum operating temperature is based on the test condition that the surface temperature of display area is less than or equal to 65 oc with lc d module alone in a temperature controlled chamber. thermal management should be considered in your pro duct design to prevent the surface temperature of display area from being over 65 oc. the range of op erating temperature may degrade in case of improper thermal management in your product design. note (3) the rating of environment is base on lcd m odule. leave lcd cell alone, this environment condi tion cant be guaranteed. except lcd cell, the customer has to consider the ability of other parts of lcd module and lcd module process. relative humidity (%rh) operating range temperature (oc) 100 80 60 -20 40 0 20 -40 90 80 40 60 20 10 storage range www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 6 version2.0 2.2 absolute ratings of environment (open cell) storage condition : with shipping package. storage temperature range : 255 storage humidity range : 5010%rh shelf life : a month 2.3 electrical absolute ratings 2.3.1 electrical absolute ratings value item symbol min. max. unit note power supply voltage vcc -0.3 13.5 v logic input voltage vin -0.3 3.6 v (1) note (1) permanent damage to the device may occur i f maximum values are exceeded. function operation should be restricted to the conditions de scribed under normal operating conditions. www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 7 version2.0 3. electrical characteristics 3.1 tft lcd module (ta = 25 2 oc) value parameter symbol min. typ. max. unit note power supply voltage v cc 10.8 12 13.2 v (1) rush current i rush - - 5 a (2) white pattern - - 1 - a horizontal stripe - - 1 1.3 a power supply current black pattern - - 0.5 - a (3) differential input high threshold voltage v lvth +100 - - mv differential input low threshold voltage v lvtl - - -100 mv common input voltage v cm 1.0 1.2 1.4 v differential input voltage |v id | 200 - 600 mv lvds interface terminating resistor r t - 100 - ohm (4) input high threshold voltage v ih 2.7 - 3.3 v cmos interface input low threshold voltage v il 0 - 0.7 v note (1) the module should be always operated withi n the above ranges. note (2) measurement condition: www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 8 version2.0 vcc rising time is 470us 470us vcc gnd 0.9vcc 0.1vcc www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 9 version2.0 note (3) the specified power supply current is unde r the conditions at vcc = 12 v, ta = 25 2 oc, f v = 120 hz, whereas a power dissipation check patter n below is displayed. c. horizontal pattern note (4) the lvds input characteristics are as foll ows: active area active area a. white pattern b. black pattern www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 10 version2.0 4. block diagram 4.1 tft lcd open cell tft lcd panel (1920x3x1080) x(r) board x(l) board input connector (40550-8210,uju( )) or equivalent ch1_0(+/-) ch1_1(+/-) ch1_2(+/-) ch1_3(+/-) ch1_4(+/-) ch1_clk(+/ - ) ch2_0(+/-) ch2_1(+/-) ch2_2(+/-) ch2_3(+/-) ch2_4(+/-) ch2_clk(+/ - ) ch3_0(+/-) ch3_1(+/-) ch3_2(+/-) ch3_3(+/-) ch3_4(+/-) ch3_clk(+/ - ) ch4_0(+/-) ch4_1(+/-) ch4_2(+/-) ch4_3(+/-) ch4_4(+/-) ch4_clk(+/ - ) c board sellvds vcc gnd www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 11 version2.0 5. input terminal pin assignment 5.1 tft lcd module input cnf1 connector pin assignment (40550-8210,uju( ) or equivalent) pin name description note 1 vcc +12v power supply 2 vcc +12v power supply 3 vcc +12v power supply 4 vcc +12v power supply 5 vcc +12v power supply 6 n.c. no connection (1) 7 gnd ground 8 gnd ground 9 gnd ground 10 ch1[0]- first pixel negative lvds differential data input. pair 0 11 ch1[0]+ first pixel positive lvds differential data input. pair 0 12 ch1[1]- first pixel negative lvds differential data input. pair 1 13 ch1[1]+ first pixel positive lvds differential data input. pair 1 14 ch1[2]- first pixel negative lvds differential data input. pair 2 15 ch1[2]+ first pixel positive lvds differential data input. pair 2 16 gnd ground 17 ch1clk- first pixel negative lvds differential cloc k input. 18 ch1clk+ first pixel positive lvds differential cloc k input. 19 gnd ground 20 ch1[3]- first pixel negative lvds differential data input. pair 3 21 ch1[3]+ first pixel positive lvds differential data input. pair 3 22 ch1[4]- first pixel negative lvds differential data input. pair 4 23 ch1[4]+ first pixel positive lvds differential data input. pair 4 24 gnd ground 25 ch3[0]- third pixel negative lvds differential data input. pair 0 26 ch3[0]+ third pixel positive lvds differential data input. pair 0 27 ch3[1]- third pixel negative lvds differential data input. pair 1 28 ch3[1]+ third pixel positive lvds differential data input. pair 1 www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 12 version2.0 29 ch3[2]- third pixel negative lvds differential data input. pair 2 30 ch3[2]+ third pixel positive lvds differential data input. pair 2 31 gnd ground 32 ch3clk- third pixel negative lvds differential cloc k input. 33 ch3clk+ third pixel positive lvds differential cloc k input. 34 gnd ground 35 ch3[3]- third pixel negative lvds differential data input. pair 3 36 ch3[3]+ third pixel positive lvds differential data input. pair 3 37 ch3[4]- third pixel negative lvds differential data input. pair 4 38 ch3[4]+ third pixel positive lvds differential data input. pair 4 39 gnd ground 40 scl i2c bus 41 n.c. no connection (1) 42 n.c. no connection (1) 43 wp write protection for eeprom 44 sda i2c bus 45 lvds_sel lvds data format selection (2) 46 n.c. no connection (1) 47 n.c. no connection (1) 48 n.c. no connection (1) 49 n.c. no connection (1) 50 n.c. no connection (1) 51 n.c. no connection (1) 52 gnd ground 53 ch4[4]+ fourth pixel positive lvds differential dat a input. pair 4 54 ch4[4]- fourth pixel negative lvds differential dat a input. pair 4 55 ch4[3]+ fourth pixel positive lvds differential dat a input. pair 3 56 ch4[3]- fourth pixel negative lvds differential dat a input. pair 3 57 gnd ground 58 ch4clk+ fourth pixel positive lvds differential clo ck input. 59 ch4clk- fourth pixel negative lvds differential clo ck input. 60 gnd ground www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 13 version2.0 61 ch4[2]+ fourth pixel positive lvds differential dat a input. pair 2 62 ch4[2]- fourth pixel negative lvds differential dat a input. pair 2 63 ch4[1]+ fourth pixel positive lvds differential dat a input. pair 1 64 ch4[1]- fourth pixel negative lvds differential dat a input. pair 1 65 ch4[0]+ fourth pixel positive lvds differential dat a input. pair 0 66 ch4[0]- fourth pixel negative lvds differential dat a input. pair 0 67 gnd ground 68 ch2[4]+ second pixel positive lvds differential dat a input. pair 4 69 ch2[4]- second pixel negative lvds differential data input. pair 4 70 ch2[3]+ second pixel positive lvds differential dat a input. pair 3 71 ch2[3]- second pixel negative lvds differential data input. pair 3 72 gnd ground 73 ch2clk+ second pixel positive lvds differential clo ck input. 74 ch2clk- second pixel negative lvds differential clo ck input. 75 gnd ground 76 ch2[2]+ second pixel positive lvds differential dat a input. pair 2 77 ch2[2]- second pixel negative lvds differential data input. pair 2 78 ch2[1]+ second pixel positive lvds differential dat a input. pair 1 79 ch2[1]- second pixel negative lvds differential data input. pair 1 80 ch2[0]+ second pixel positive lvds differential dat a input. pair 0 81 ch2[0]- second pixel negative lvds differential data input. pair 0 82 gnd ground note (1) reserved for internal use. please leave it open. note (2) high=connect to +3.3v or open : vesa format low= connect to gnd : jeida format. note (3) interface optional pin has internal scheme as following diagram. customer should keep the interface voltage level requirement as below. www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 14 version2.0 note (4) lvds 4-port data mapping port channel of lvds data stream 1st port first pixel 1, 5, 9, 1913, 1917 2nd port second pixel 2, 6, 10, .1914, 1918 3rd port third pixel 3, 7, 11, .1915, 1919 4th port fourth pixel 4, 8, 12, .1916, 1920 system board panel ic >20k ohm 1k ohm interface voltage level vh > 3.0v www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 15 version2.0 5.2 lvds interface vesa format : sellvds = h or open jeida format : sellvds = l ag0 ar5 ab1 ar4 ar3 ar2 ar1 ar0 ab0 ag5 ag4 ag3 ag2 ag1 de vs hs ab5 ab4 ab3 ab2 rev ab7 ab6 ag7 ag6 ar7 ar6 current cycle ar0 ag1 ab2 ar6 ag0 ab1 de rev ar 0p ar 0n ar 1p ar 1n ar 2p ar 2n ar 3p ar 3n vesa format jeida format ag4 ar7 ab5 ar6 ar5 ar4 ar9 ar8 ab4 ag7 ag6 ag5 ag9 ag8 de vs hs ab7 ab6 ab9 ab8 rev ab3 ab2 ag3 ag2 ar3 ar2 ar4 ag5 ab6 ar2 ag4 ab5 de rev ar 4p ar 4n rev ab9 ab8 ag9 ag8 ar9 ar8 ar8 rev ar 0p ar 0n ar 1p ar 1n ar 2p ar 2n ar 3p ar 3n ar 4p ar 4n rev ab1 ab0 ag1 ag0 ar1 ar0 ar0 rev ar0~ar9: first pixel r data (9; msb, 0; lsb) ag0~ag9: first pixel g data (9; msb, 0; lsb) ab0~ab9: first pixel b data (9; msb, 0; lsb) de : data enable signal dclk : data clock signal rsv : reserved www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 16 version2.0 5.3 color data input assignment the brightness of each primary color (red, green and blue) is based on the 10-bit gray scale data in put for the color. the higher the binary input, the brighter th e color. the table below provides the assignment of color versus data input. data signal red green blue color r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 g9 g8 g7 g6 g5 g4 g3 g2 g1 g0 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 basic colors black red green blue cyan magenta yellow white 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 gray scale of red red (0) / dark red (1) red (2) : : red (1021) red (1022) red (1023) 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : ; 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 gray scale of green green (0) / dark green (1) green (2) : : green (1021) green (1022) green (1023) 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 gray scale of blue blue (0) / dark blue (1) blue (2) : : blue (1021) blue (1022) blue (1023) 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1 note (1) 0: low level voltage, 1: high level voltag e www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 17 version2.0 6. interface timing 6.1 input signal timing specifications the input signal timing specifications are shown as the following table and timing diagram. signal item symbol min. typ. max. unit note frequency f clkin (=1/tc) 60 74.25 80 mhz input cycle to cycle jitter t rcl - - 200 ps (3) spread spectrum modulation range f clkin_mod f clkin -2% - f clkin +2% mhz lvds receiver clock spread spectrum modulation frequency f ssm - - 200 khz (4) setup time tlvsu 600 - - ps lvds receiver data hold time tlvhd 600 - - ps (5) f r5 97 100 103 hz frame rate f r6 117 120 123 hz (6) total tv 1115 1125 1135 th tv=tvd+tvb display tvd 1080 1080 1080 th vertical active display term blank tvb 35 45 55 th total th 540 550 575 tc th=thd+thb display thd 480 480 480 tc horizontal active display term blank thb 60 70 95 tc note (1) since the module is operated in de only m ode, hsync and vsync input signals should be set to low logic level. otherwise, this module would operate abnorma lly. note (2) please make sure the range of pixel clock has follow the below equation: f clkin(max) f R r 6 tv th w w f r 5 tv th f w w R clkin(min) www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 18 version2.0 input signal timing diagram note (3) the input clock cycle-to-cycle jitter is d efined as below figures. trcl = i t 1 C ti t vd t vb t v t h de t hb valid display data ( 480 clocks ) t c dclk t hd de dat a www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 19 version2.0 note (4) the sscg (spread spectrum clock generator) is defined as below figures. note (5) the lvds timing diagram and setup/hold tim e is defined and showing as the following figures. lvds receiver interface timing diagram note (6) : (odsel) = h/l or open for 100/120hz fram e rate. please refer to 5.1 for detail information rxclk+/- rxn+/- 14 1 t 14 3 t 14 5 t 14 7 t 14 9 t 14 11 t 14 13 t tlvsu tlvhd tc www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 20 version2.0 0.5 Q QQ Q t 1 Q QQ Q 10ms 0 Q QQ Q t 2 Q QQ Q 50ms 0 Q QQ Q t 3 Q QQ Q 50ms 500ms Q QQ Q t 4 50% 0v 0v 50% t 6 t 5 t 3 t 1 0.1v cc 0.1v cc t 4 t 2 valid power on power off lvds signals power on/off sequence backlight (recommended) 500ms Q QQ Q t 5 100ms Q QQ Q t 6 t 7 t 8 option signals (lvds_sel) 0 Q QQ Q t 7 Q QQ Q t2 0 Q QQ Q t 8 Q QQ Q t3 6.2 power on/off sequence (ta = 25 2 oc) to prevent a latch-up or dc operation of lcd module , the power on/off sequence should be as the diagram below. note (1) the supply voltage of the external system for the module input should follow the definition of vcc. note (2) apply the lamp voltage within the lcd oper ation range. when the backlight turns on before the lcd operation or the lcd turns off before the b acklight turns off, the display may momentarily become abnormal screen. note (3) in case of vcc is in off level, please kee p the level of input signals on the low or high impedance. if t2<0, that maybe cause electrical ove rstress failure. note (4) t4 should be measured after the module has been fully discharged between power off and on period. note (5) interface signal shall not be kept at high impedance when the power is on. www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 21 version2.0 7. optical characteristics 7.1 test conditions item symbol value unit ambient temperature ta 25 2 o c ambient humidity ha 50 10 %rh supply voltage v cc 5.0 v input signal according to typical value in "3. elec trical characteristics" inverter current i l 12.50.5 ma inverter driving frequency f l 583 khz 7.2 optical specifications the relative measurement methods of optical charact eristics are shown as below. the following items sh ould be measured under the test conditions described in 7.1 and stable environment shown in note (5). item symbol condition min. typ. max. unit note rx (0.638) - red ry (0.323) - gx (0.288) - green gy (0.605) - bx (0.146) - blue by (0.055) - wx (0.280) - color chromaticity white wy x =0 , y =0 viewing angle at normal direction with cmo module typ.-0.03 (0.290) typ+0.03 - (1),(5) center transmittance t% - 4.0 % (1), (7) contrast ratio cr x =0 , y =0 with cmo module 3000 4000 - (1), (3) response time gray to gray average x =0 , y =0 with cmo module@120hz - 4.5 9 ms (4) white variation w 1.3 - (1), (6) crosstalk ct x =0 , y =0 with cmo module 4 % (1), (8) x + 80 88 - horizontal x - 80 88 - y + 80 88 - viewing angle vertical y - cr 20 with cmo module 80 88 - deg. (1), (2) note (1) light source is cmos v315h1-l01 blu and d riving voltages are based on suitable gamma voltage s. note (2) definition of viewing angle ( x, y): viewing angles are measured by ez-contrast 160r (e ldim) www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 22 version2.0 note (3) definition of contrast ratio (cr): the contrast ratio can be calculated by the followi ng expression. contrast ratio (cr) = l1023 / l0 l1023: luminance of gray level 1023 l 0: luminance of gray level 0 cr = cr (5) ,where cr (x) is corresponding to the c ontrast ratio of the point x at the figure in note (6). note (4) definition of gray-to-gray switching time: the driving signal means the signal of gray 0, 127, 255, 383,511, 639,767, 895, and 1023 gray to gray average time means the average switchi ng time of gray 0, 127, 255, 383,511, 639,767, 895, and 1023 to each other. note (5) measurement setup: the lcd module should be stabilized at given temp erature for 60 minutes to avoid abrupt temperature change during measuring. in order to stabilize the luminance, the measurement should be executed after lighting backlight for 60 minutes in a windless roo m. 12 oclock direction y+ = 90o 6 oclock y- = 90o x ? x + y- y + x- y+ y- x+ normal x = y = 0o x+ = 90o x- = 90o optical response 100% 90% 10% 0% gray to gray switching time t ime gray to gray switching time www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 23 version2.0 note (6) definition of white variation ( w): measure the luminance of gray level 1023 at 5 point s w = maximum [l (1), l (2), l (3), l (4), l (5)] / m inimum [l (1), l (2), l (3), l (4), l (5)] where l (x) is corresponding to the luminance of th e point x at the figure below. note (7) definition of transmittance(t%): module with signal input gray 1023, blu film struct ure is dp and diffuser cs - 2000 500 mm lcd m odule lcd panel li ght shield room (ambient luminance < 2 l ux) field of view = 1o luminance of lcd module luminance of backlight 100% transmittance = d w active area vertical line horizontal line : test point x=1 to 5 5 1 2 3 4 d/4 d/2 3d/4 w/4 w/2 3w/4 x www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 24 version2.0 note (8) definition of cross talk (ct): ct = | y b C y a | / y a 100 (%) where: y a = luminance of measured location without gray leve l 0 pattern (cd/m 2 ) y b = luminance of measured location with gray level 0 pattern (cd/m 2 ) active area y a, u (d/2,w/8) y a, r (7d/8,w/2) y a, d (d/2,7w/8) y a, l (d/8,w/2) (0, 0) (d, w) gray 512 active area gray 0 (d/4,w/4) (3d/4,3w/4) ( 0, 0) y b, u (d/2,w/8) y b, r (7d/8,w/2) y b, d (d/2,7w/8) y b, l (d/8,w/2) (d, w) gray 512 gray 0 www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 25 version2.0 8. definition of labels 8.1 open cell label the barcode nameplate is pasted on each open cell a s illustration for cmo internal control. 8.2 carton label the barcode nameplate is pasted on each box as illu stration, and its definitions are as following expl anation (a) model name: v315h1C ph2 (b) carton id: cmo internal control (c) quantities:21 p.o. no. parts id. carton id. quantities 21 xxxxxxxxxxxxxx made in taiwan v315h1 - ph2 xxxxxxxxxxxxxx www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 26 version2.0 9. packaging 9.1 packing specifications (1) 21 lcd tv panels / 1 box (2) box dimensions : 970 (l) x 640 (w) x 319 (h) (3) weight : approximately 38kg ( 21 panels per box ) 9.2 packing method figures 9-1 and 9-2 are the packing method tape panel top layer for empty tray carton label carton figure.9-1 packing method www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 27 version2.0 film pe sheet pp belt carton label (l1300*w1000*h140mm) (l1850*50*50mm) (l1130*50*50mm) sea & land transportation air transportation pp belt carton label film pe sheet (l1300*w1000*h140mm) (l1130*50*50mm) (l1130*50*50mm) gross : 471kg gross : 319kg figure.9-2 packing method www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 28 version2.0 10. precautions 10.1 assembly and handling precautions (1) do not apply rough force such as bending or tw isting to the product during assembly. (2) to assemble backlight or install module into u sers system can be only in clean working areas. th e dust and oil may cause electrical short or worsen the polari zer. (3) its not permitted to have pressure or impulse on the module because the lcd panel will be damage d. (4) always follow the correct power sequence when the product is connecting and operating. this can p revent damage to the cmos lsi chips during latch-up. (5) do not pull the i/f connector in or out while the module is operating. (6) use a soft dry cloth without chemicals for cle aning, because the surface of polarizer is very sof t and easily scratched. (7) it is dangerous that moisture come into or con tacted the product, because moisture may damage the product when it is operating. (8) high temperature or humidity may reduce the pe rformance of module. please store this product with in the specified storage conditions. (9) when ambient temperature is lower than 10oc ma y reduce the display quality. for example, the resp onse time will become slowly. 10.2 safety precautions (1) if the liquid crystal material leaks from the panel, it should be kept away from the eyes or mout h. in case of contact with hands, skin or clothes, it has to be w ashed away thoroughly with soap. (2) after the products end of life, it is not har mful in case of normal operation and storage. www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 29 version2.0 11. mechanical drawing www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 30 version2.0 www.datasheet.co.kr datasheet pdf - http://www..net/
issued date:nov. 10, 2009 model no.: V315H1-PH2 approval 31 version2.0 www.datasheet.co.kr datasheet pdf - http://www..net/


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