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st ST20P18 16k 8-bit single chip microcontroller notice: sitronix technology corp. reserves the righ t to change the contents in this document without p rior notice. this is not a final specification. some parameters are subject to change. ver 1.4 1 / 12 6/13/07 1 1 . . f f e e a a t t u u r r e e s s 8-bit static pipeline cpu rom: 16k x 8 bits prom(otp) ram: 192 x 8 bits 32-level deep stack operating voltage : 2.4v ~ 5.5v power-on timer(pwrt) - pin option to enable general-purpose i/o (gpio) ports - 28 pins are programmable cmos i/o (port-a/b/c and port-e low nibble),20 pins (port-a high nibble & port-b/c) are shared with lcd segments - 8 open drain output pins share with lcd coms - hardware de-bounce option for port-a - bit programmable pull-up for input pins 2 input pins - otp option bit to select (shared with oscx) 30 output pins - eight are shared with lcd com and twenty are sh ared with lcd segments, two are shared with psg timer / counter - one 8-bit timer / 16-bit event counter - one 8-bit base timer five powerful interrupt sources - external interrupt (edge trigger) / rfc interrupt (share with external interrupt) - timer1 interrupt - base timer interrupt - porta[7~0] interrupt (transition trigger) - dac reload interrupt watchdog timer (wdt) - with its own low power internal oscillator for re liability - four selectable time bases - wdt reset cpu only - otp option bit to enable - one option bit is selectable to reset or not in w ai1 and stp mode dual clock source with warm-up timer - oscx: low frequency crystal oscillator with 32768 hz - osc: high frequency rc oscillator from 500k ~ 8mh z cpu clock 250k ~ 4mhz on-chip internal oscillator for wdt - < 5ua typical, 3v, 27 lcd controller driver - 16 level contrast control - 320 ( 8x40) dots ( 1/8 duty, 1/4 bias, programma ble) - 160 ( 4x40) dots ( 1/4 duty, 1/3 bias, programma ble) - two clock source options: rc and resonator oscill ator - keyboard scan function supported on 40 shared segment drives - internal bias resistors(1/4 bias & 1/3 bias) with 32 level driving strength control programmable sound generator (psg) - tone generator - sound effect generator - 16 level volume control - digital dac for speech / tone resistor frequency converter (rfc) - up to 4 resistors measurement - built-in one independent 16-bits counter without sharing with timer counter - 3 clock sources for rfc counter: sysck, oscx and intx - 5 scales of clock divider for rfc counter carrier wave generator(cgr) - built-in one digital pll - standard clock rate output for remote control three power down modes - wai0 mode - wai1 mode - stp mode
ST20P18 ver 1.4 2/12 6/13/07 2 2 . . g g e e n n e e r r a a l l d d e e s s c c r r i i p p t t i i o o n n ST20P18 is a low-cost, high-performance, fully stat ic, 8-bit microcontroller designed with cmos silicon gate technology. it comes with 8-bit pipeline cpu core, sram, timer, lcd driver, i/o port, psg, rfc, cgr, otp pro gram rom and built-in dual oscillator. and also, some ne w functions have been added in the ST20P18 to enhance the performance of st2016 for more system application. power bouncing during power-on is a major problem w hen designing a reliable system. after the power return s to normal level, the system may recover its original s tates and keeps working correctly. furthermore, the power-on timer (pwrt) which is designed to provide a fixed delay t ime, keep the part in reset for longer after power-up or low-v reset released. with these two power management, th e system may operate under more stabile power supply. a highly reliable watchdog timer(wdt) with its own low power internal oscillator which does not require an y external components, provides protection against software lo ckup. moreover, the feature of wdt reset cpu only make it possible to do the rapid system recovery after watc hdog timer reset. and the option bit is selectable to re set or not in wai1 and stp mode for various application. the resistor frequency converter(rfc) which is also a new function added in the ST20P18, can compare thre e different sensors with the reference resistor separ ately. with one independent 16-bits counter, the rfc can count and stop automatically only if rfc is enabled. this mak e it easy for the humidity or thermometric application. more and more remote control applications are used today. the ST20P18 also equips a carrier wave generator(cg r) to support this application with one digital pll an d provide the standard clock rates output for remote control. with these integrated functions inside, the ST20P18 single chip microcontroller is a right solution for busine ss equipment and consumer applications. such as watch, calculator, lcd games, thermometer, hygrometer, ir remote control and so on. ST20P18 is definitely a p erfect solution for implementation.
ST20P18 ver 1.4 3/12 6/13/07 3 3 . . b b l l o o c c k k d d i i a a g g r r a a m m
ST20P18 ver 1.4 4/12 6/13/07 4 4 . . p p a a d d d d i i a a g g r r a a m m
ST20P18 ver 1.4 5/12 6/13/07 5 5 . . p p a a d d d d e e s s c c r r i i p p t t i i o o n n pin no. designation type description 12~9 seg0/pa4 ~ seg3/pa7 o i/o lcd segment output port-a bit programmable i/o 8~5 seg4- seg7 o lcd segment output segment output port 4~1, 68~65 seg8 -seg15 o lcd segment output segment output port 64~57 seg16-seg23 o lcd segment output segment output port 56~49 seg24/pc0 ~ seg31/pc7 o i/o lcd segment output port-c bit programmable i/o 48~41 seg32/pb0 ~ seg39/pb7 o i/o lcd segment output port-b bit programmable i/o 39~32 com 0 C 7 o o lcd common output open drain output port 24 reset i pad reset input (high active) 29 gnd p ground input and chip substrate 16 pa0/intx i/o i i i port-a bit programmable i/o edge-trigger interrupt. transition-trigger interrupt programmable timer1 clock source 15~9 pa 1-7 i/o i port-a bit programmable i/o transition-trigger interrupt 28~27 psgo,psgob o psg/dac output 26 vdd p power supply 22 oscxi/pd0 i i osc input pin. for 32768hz crystal port-d input 21 oscxo/pd1 o i osc output pin. for 32768hz crystal port-d input 25 osci i osc input pin. toward to external resistor 20~17 pe0~pe3 i/o port-e bit programmable i/o rfc/cgr output 31 v2 o multi-level power supply for liquid crystal drive. 23 vpp p otp programming power 40 test i chip test function. leave it open 30 pwrt i power on timer enable control pin. legend: i = input, o = output, i/o = input/outp ut, p = power.
ST20P18 ver 1.4 6/12 6/13/07 6 6 . . o o t t p p r r o o m m p p r r o o g g r r a a m m m m i i n n g g i i n n t t e e r r f f a a c c e e 6.1 interface description in order to program otp rom, several pins have to b e reserved on the pcb which is bounding with ST20P18. these total are 8 pins that include following list table 6-1: . it just be used to connect writer to program otp rom. after programming and disconnecting from writer, they can be used as original purpose. table 6-1: pin assignment of interface p18 pad name (spi interface) pin type description vpp vpp power high voltage power supply 1) otp program, program verify, vpp=> 12v 2) otp read:vpp=> floating gnd vss power ground. vcc vdd power low voltage (2.4v-5.4v) power supply. pe3 ssb input spi signal seg4 mosi input spi signal seg5 miso output spi signal pe2 sck input spi signal reset reset input spi reset 6.2 programming function specification there are reserved 5 option bits to select to apply or not the function we needed. it includes pd input, wdt e nable, wdt stop at wai-1 and code protection. to setup the options should program the otp rom by otp writer by control register. the register otp($37) is used to read contents of the option word.
ST20P18 ver 1.4 7/12 6/13/07 table 6-2: option ward table 6-3: otp option ward read back window 7 7 . . p p o o w w e e r r o o n n t t i i m m e e r r the power-on timer (pwrt) is offered necessary dela ys on power-up to keep the chip in reset until the cry stal oscillator is stable, the typical delay time in 3v at 25 is 32ms, and operation in voltage 2.4v~5.5v ,60 ~ -10 is 4~640ms. the default state is high with one interna l pull-up resistance. table 7-4: power on timer pin option bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 def ault cp - - - wdtstp wdten - pd 1--- 11-1 bit 7: cp : otp rom code protect. 0 =protect otp data. 1 =un-protect otp data. bit 3: wdtstp : wdt stop control bit. 0 = wdt stop at wai-1 and stp mode. 1 = wdt is always active if wdten is enabled. bit 2: wdten : wdt enable. 0 = wdt disable. 1 = wdt enable. bit 0: pd : port function selection 0 = pd used as input port. 1 = osc input pin for 32768hz crystal. address name r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 default $037 opt r cp - - pwrt wdtstp wdten - pd 1--1 11-1 ic pad option description default 0 disable power-on timer, tie to gnd pwrt 1 enable power-on timer, tie to vcc 1:input pull-up
ST20P18 ver 1.4 8/12 6/13/07 8 8 . . a a p p p p l l i i c c a a t t i i o o n n c c i i r r c c u u i i t t s s 8.1 application circuit under 3v operating voltage vdd : 3v clock : 32768hz crystal and 4.0mhz rc o scillator lcd : 1/8 duty i/o : port a alarm : psgo, psgob figure 8-1: application circuit without lcd keybo ard awaking pulse
ST20P18 ver 1.4 9/12 6/13/07 vdd : 3v clock : 32768hz crystal and 4.0mhz rc o scillator lcd : 1/8 duty i/o : port a alarm : psgo, psgob 25pf figure 8-2: application circuit with lcd keyboard awaking pulse note: 1. coms and segs output gnd level, while the lcd is turned off. 2. if lcd is turned off, keyboard awaking pulses mu st be turned off at the same time. 3. connect one capacitor of 100pf to osci stabilize os cillation frequency. this capacitor must be placed close to osci.
ST20P18 ver 1.4 10/12 6/13/07 9 9 . . p p a a c c k k a a g g e e i i n n f f o o r r m m a a t t i i o o n n dimensions in millimeters 80l millimeter symbol min. nom. max. b 0.30 0.35 0.45 e 0.80 bsc. d2 18.4 ref e2 12.0 ref tolereance of form and position aaa 0.25 bbb 0.20 ccc 0.20
ST20P18 ver 1.4 11/12 6/13/07 1 1 0 0 . . p p i i n n c c o o n n f f i i g g u u r r a a t t i i o o n n ( ( q q f f p p 8 8 0 0 ) ) 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 seg11 nc nc seg10 seg 9 seg 8 seg 7 seg 6 seg 5 seg 4 pa7/seg 3 pa6/seg 2 pa5/seg 1 pa4/seg 0 pa3 pa2 pa1 pa0/intx pe3 pe2 pe1 pe0 o s c xo / p d 1 nc nc o s c x i / p d 0 v pp r e s et o s c i vd d ps go b ps go gn d p w r t v 2 c o m 7 c o m 6 c o m 5 c o m 4 c o m 3 p c 1 / s e g 25 p c 0 / s e g 24 s e g 23 s e g 22 s e g 21 s e g 20 s e g 19 s e g 18 s e g 17 s e g 16 s e g 15 s e g 14 s e g 13 s e g 12 n c n c com2 com1 com0 nc pb7/seg39 pb6/seg38 pb5/seg37 pb4/seg36 nc nc pb3/seg35 pb2/seg34 pb1/seg33 pb0/seg32 pc7/seg31 pc6/seg30 pc5/seg29 pc4/seg28 pc3/seg27 pc2/seg26 nc nc nc nc
ST20P18 the above information is the exclusive intellectual property of sitronix technology corp. and shall no t be disclosed, distributed or reproduced without permission from sitronix. sitro nix technology corp. reserves the right to change t his document without prior notice and makes no warranty for any errors which may appe ar in this document. sitronix products are not int ended for use in life support, critical care, medical, safety equipment, or simila r applications where products failure could result in injury, or loss of life, or personal or physical harm, or any military or defense applicati on, or any governmental procurement to which specia l terms or provisions may apply. ver 1.4 12/12 6/13/07 r r e e v v i i s s i i o o n n version page description date 1.2 8,9 modify rosc 180k ohm to 226k ohm under 4mhz condition2006 /3/1 1.3 1 add cpu clock 250k ~ 4mhz ..2006/6/26 1.4 10,11 move package information to page10,11 ..2006/8/8

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