View FL6961MY_1942692.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

november 2010 ? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting fl6961 single-stage flyback and boundary mode pfc controller for lighting features ? boundary mode pfc controller ? low input current thd ? controlled on-time pwm ? zero-current detection ? cycle-by-cycle current limiting ? leading-edge blanking instead of rc filtering ? low startup current: 10a typical ? low operating current: 4.5ma typical ? feedback open-loop protection ? programmable maximum on-time (mot) ? output over-voltage clamping protection ? clamped gate output voltage 16.5v applications ? general led lighting ? industrial, commercial and residential fixtures ? outdoor lighting : street, roadway, parking, construction and ornamental led lighting fixtures description the fl6961 is general lighting power controller for low to high power lumens applications requiring power factor correction. it is designed for flyback, or boost converter operating in boundary-mode. the fl6961 provides a controlled on-time to regulate the output dc voltage and achieve natural power factor correction. the maximum on-time of the external switch is programmable to ensure safe operation during ac brownouts. an innovative multi-vector error amplifier is built in to provide rapid transient response and precise output voltage clamping. a built-in circuit disables the controller if the output feedback loop is opened. the startup current is lower than 20a and the operating current has been reduced to under 6ma. the supply voltage can be up to 25v, maximizing application flexibility. ordering information part number operating temperature range package packing method FL6961MY -40c to +125c 8-pin, small outline package (sop) tape & reel
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 2 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting application diagram c hf c f1 c f2 v ac cs 8 zcd inv comp mot gate gnd vcc 7 6 5 1 2 3 4 v out figure 1. typical application circuit for step-up converter figure 2. typical application circuit for single stage pfc converter block diagram uvlo 2.65v 2.3v voltage regulator 2.5v v cc_on = 12v v cc_off = 9.5v 9r 1r 2.75v 2.75v 0.45v 10v 2.1v/1.75v sawtooth generator thd optimization inhibit timer v limit driver v cc r s q leb disable inv v cc gnd zcd gate cs 4 7 5 6 8 1 3 2 mot comp v zcdhys = 0.35v internal supply 16.5v v ref ovp figure 3. function block diagram
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 3 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting marking information figure 4. marking information pin configuration figure 5. pin configuration (top view) pin definitions pin # name description 1 inv inverting input of the error amplifier . inv is connected to the converter output via a resistive divider. this pin is also used for over-v oltage clamping and open-loop feedback protection. 2 comp output of the error amplifier . to create a precise clamping protection, a compensation network between this pin and gnd is suggested. 3 mot maximum on time . a resistor from mot to gnd is used to determine the maximum on-time of the external power mosfet. the maximum output pow er of the converter is a function of the maximum on time. 4 cs current sense . input to the over-current protecti on comparator. when the sensed voltage across the sense resistor reaches the internal thres hold (0.8v), the switch is turned off to activate cycle-by-cycle current limiting. 5 zcd zero current detection . this pin is connected to an auxiliary winding via a resistor to detect the zero crossing of the switch current. when the zero crossing is detected, a new switching cycle is started. if it is connected to gnd, the device is disabled. 6 gnd ground . the power ground and signal ground. placing a 0.1f decoupling capacitor between vcc and gnd is recommended. 7 gate driver output . totem-pole driver output to drive the external power mosfet. the clamped gate output voltage is 16.5v. 8 v cc power supply . driver and control circuit supply voltage. f - fairchild logo z- plant code x- year code y- week code tt: die run code t: package type (m=sop) p: z: pb free y: green compound m: manufacture flow code fl6961 tpm
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 4 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. all voltage values, except differential voltage, are given with respect to gnd pin. symbol parameter min. max. unit v vcc dc supply voltage 30 v v high gate driver -0.3 30.0 v v low others (inv, comp, mot, cs) -0.3 7.0 v v zcd input voltage to zcd pin -0.3 12.0 v p d power dissipation 400 mw t j operating junction temperature -40 +125 c ja thermal resistance (junction-to-air) 150 c/w t stg storage temperature range -65 + 150 c t l lead temperature (wave soldering or ir, 10 seconds) +230 c esd human body model: jesd22-a114 2.5 kv machine model: jesd22-a115 200 v recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. typ. max. unit t a operating ambient temperature -40 +125 c
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 5 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting electrical characteristics unless otherwise noted, v cc =15v and t j =-40c to 125c. current is defined as positive into the device and negative out of the device. symbol parameter conditions min. typ. max. units v cc section v cc-op continuous operation voltage 24.5 v v cc-on turn-on threshold voltage 11.5 12.5 13.5 v v cc-off turn-off threshold voltage 8.5 9.5 10.5 v i cc-st startup current v cc =v cc-on ? 0.16v 10 20 a i cc-op operating supply current v cc =12v, v cs =0v, c l =3nf, f sw =60khz 4.5 6 ma v cc-ovp v dd over-voltage protection level 26.8 27.8 28.8 v t d-vccovp v dd over-voltage protection debounce 30 s error amplifier section v ref reference voltage 2.475 2.500 2.525 v gm transconductance 125 mho v invh clamp high feedback voltage 2.65 2.70 v v invl clamp low feedback voltage 2.25 2.30 v v out high output high voltage 4.8 v v oz zero duty cycle output voltage 1.15 1.25 1.35 v v inv-ovp over-voltage protection for inv input 2.70 2.75 2.80 v v inv-uvp under-voltage protection for inv input 0.40 0.45 0.50 v i comp source current v inv =2.35v, v comp =1.5v 10 20 a v inv =1.5v 550 800 sink current v inv =2.65v, v comp =5v 10 20 current-sense section v pk threshold voltage for peak current limit cycle-by-cycle limit 0.77 0.82 0.87 v t pd propagation delay 200 ns t leb leading-edge blanking time r mot =24k ? , v comp =5v 400 500 ns r mot =24k ? , v comp =v oz +50mv 270 350 gate section v z - out output voltage maximum (clamp) v cc =25v 14.5 16.0 17.5 v v ol output voltage low v cc =15v, i o =100ma 1.4 v v oh output voltage high v cc =14v, i o =100ma 8 v t r rising time v cc =12v, c l =3nf, 20~80% 80 ns t f falling time v cc =12v, c l =3nf, 80~20% 40 ns continued on the following page?
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 6 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting electrical characteristics unless otherwise noted, v cc =15v and t j =-40c to 125c. current is defined as positive into the device and negative out of the device. symbol parameter conditions min. typ. max. units zero current detection section v zcd input threshold voltage rising edge v zcd increasing 1.9 2.1 2.3 v h ys of v zcd threshold voltage hysteresis v zcd decreasing 0.35 v v zcd-high upper clamp voltage i zcd =3ma 12 v v zcd-low lower clamp voltage i zcd =-1.5ma 0.3 v t dead maximum delay, zcd to output turn-on v comp =5v, f sw =60khz 100 400 ns t restart restart time output turned off by zcd 300 500 700 s t inhib inhibit time (maximum switching frequency limit) r mot =24k ? 2.8 s v dis disable threshold voltage 130 200 250 mv t zcd-dis disable function debounce time r mot =24k ? , v zcd =100mv 800 s maximum on time section v mot maximum on time voltage 1.25 1.30 1.35 v t on-max maximum on time programming (resistor based) r mot =24k ? , v cs =0v, v comp =5v 25 s
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 7 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting typical performance characteristics 2.475 2.485 2.495 2.505 2.515 2.525 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v ref (v) 0.0 0.6 1.2 1.8 2.4 3.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) i cc-op (ma) figure 6. v ref vs. t a figure 7. i cc-op vs. t a 24.20 24.28 24.36 24.44 24.52 24.60 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) t on-max ( s) 11.0 11.6 12.2 12.8 13.4 14.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v th-on (v) figure 8. t on-max vs. t a figure 9. v th-on vs. t a 8.5 8.9 9.3 9.7 10.1 10.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v th-off (v) 4.0 6.4 8.8 11.2 13.6 16.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) i cc-st ( a) figure 10. v th-off vs. t a figure 11. i cc-st vs. t a
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 8 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting typical performance characteristics (continued) 1.250 1.270 1.290 1.310 1.330 1.350 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v mot (v) 15.0 15.6 16.2 16.8 17.4 18.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v z-out (v) figure 12. v mot vs. t a figure 13. v z-out vs. t a 0.77 0.79 0.81 0.83 0.85 0.87 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature ( ) v pk (v) figure 14. v pk vs. t a
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 9 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting functional description error amplifier the inverting input of the error amplifier is referenced to inv. the output of the error amplifier is referenced to comp. the non-inverting input is internally connected to a fixed 2.5v 2% voltage. the output of the error amplifier is used to determine the on-time of the pwm output and regulate the output voltage. to achieve a low input current thd, the variation of the on time within one input ac cycle should be very small. a multi- vector error amplifier is built in to provide fast transient response and precise output voltage clamping. for fl6961, connecting a capacitance, such as 1f, between comp and gnd is suggested. the error amplifier is a trans-conductanc e amplifier that converts voltage to current with a 125mho. startup current typical startup current is le ss than 20a. this ultra-low startup current allows the usage of high resistance, low-wattage startup resistor. for example, 1m ? /0.25w startup resistor and a 10f/25v (v cc hold-up) capacitor are recommended for an ac-to-dc power adaptor with a wide input range 85-265v ac . operating current operating current is typically 4.5ma. the low operating current enables a better efficiency and reduces the requirement of v cc hold-up capacitance. maximum on-time operation given a fixed inductor value and maximum output power, the relationship between on-time and line voltage is: ? ? ? = 2 2 rms o on v p l t (1) if the line voltage is too low or the inductor value is too high, t on is too long. to avoid extra low operating frequency and achieve brownout protection, the maximum value of t on is programmable by one resistor, r i , connected between mot and gnd. a 24k ? resistor r i generates corresponds to 25s maximum on time: () s k r t i on 24 25 ) ( (max) ? = (2) the range of the maximum on-time is designed as 10 ~ 50s. peak current limiting the switch current is sensed by one resistor. the signal is feed into cs pin and an input terminal of a comparator. a high voltage in cs pin terminates a switching cycle immediately and cycle-by-cycle current limit is achieved. the designed threshold of the protection point is 0.82v. leading-edge blanking (leb) a turn-on spike on cs pin appears when the power mosfet is switched on. at the beginning of each switching pulse, the current-lim it comparator is disabled for around 400ns to avoid premature termination. the gate drive output cannot be switched off during the blanking period. conventional rc filtering is not necessary, so the propagation delay of current limit protection can be minimized. under-voltage lockout (uvlo) the turn-on and turn-off threshold voltage is fixed internally at 12v/9.5v. this hysteresis behavior guarantees a one-shot start up with proper startup resistor and hold-up capacitor. with an ultra-low startup current of 20a, one 1m ? r in is sufficient for startup under low input line voltage, 85v rms . power dissipation on r in would be less than 0.1w even under high line (v ac =265v rms ) condition. output driver with low on resistance and high current driving capability, the output driver can drive an external capacitive load larger than 3000pf. cross conduction current has been avoided to minimize heat dissipation, improving efficiency and reliability. this output driver is internally clamped by a 16.5v zener diode. zero-current detection (zcd) the zero-current detection of the inductor is achieved using its auxiliary winding. when the stored energy of the inductor is fully released to output, the voltage on zcd goes down and a new switching cycle is enabled after a zcd trigger. the power mosfet is always turned on with zero inductor current such that turn-on loss and noise can be minimized. the converter works in boundary-mode and peak inductor current is always exactly twice of the average current. a natural power factor correction function is achieved with the low- bandwidth, on-time modulation. an inherent maximum off time is built in to ens ure proper start-up operation. this zcd pin can be used as a synchronous input. noise immunity noise on the current sense or control signal can cause significant pulse-width jitter, particularly in the boundary-mode operation. slope compensation and built-in debounce circuit can alleviate this problem. because the fl6961 has a single ground pin, high sink current at the output cannot be returned separately. good high-frequency or rf layout practices should be followed. avoiding long pcb traces and component leads, locating compensation and filter components near to the fl6961, and increasing the power mosfet gate resistance improve performance.
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 10 fl6961 ? single-stage flyback and bounda ry mode pfc controller for lighting physical dimensions 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge figure 15. 8-lead, soic,jedec ms-012, .150 inch narrow body package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2010 fairchild semiconductor corporation www.fairchildsemi.com fl6961 ? rev. 1.0.1 11 fl6961 ? single-stage flyback and boundary mode pfc controller for lighting

▲Up To Search▲

Price & Availability of FL6961MY

	To Download FL6961MY Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .