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February 1999
FDR858P Single P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description
The SuperSOT-8 family of P-Channel Logic Level MOSFETs have been designed to provide a low profile, small footprint alternative to industry standard SO-8 little foot type product. This P-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for notebook computer applications: load switching and power management, battery charging circuits, and DC/DC conversion.
Features
-8 A, -30 V. RDS(ON) = 0.019 @ VGS = -10 V, RDS(ON) = 0.028 @ VGS = -4.5 V. Low gate charge (21nC typical). High performance trench technology for extremely low RDS(ON). SuperSOTTM-8 package: small footprint (40%) less than SO-8); low profile (1mm thick); maximum power comperable to SO-8.
SOT-23
SuperSOTTM-6
SuperSOTTM -8
SO-8
SOT-223
SOIC-16
D S
D
S
5 6
D G
4 3 2 1
7 8
SuperSOT -8
Mark: 858P
TM
D D
Absolute Maximum Ratings
Symbol Parameter
TA = 25oC unless otherwise noted
Ratings Units
VDSS VGSS ID PD
Drain-Source Voltage Gate-Source Voltage Draint Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
-30 20
(Note 1)
V V A
-8 -50 1.8 1 0.9 -55 to 150
W
TJ,TSTG RJA RJC
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
70 20
C/W C/W
(c) 1999 Fairchild Semiconductor Corporation
FDR858P Rev.C
Electrical Characteristics
Symbol Parameter OFF CHARACTERISTICS
(TA = 25OC unless otherwise noted )
Conditions Min Typ Max Units
BVDSS
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current
VGS = 0 V, ID = -250 A ID = -50 A, Referenced to 25 C VDS = -24 V, VGS = 0 V TJ = 55C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = -250 A ID = -50 A, Referenced to 25 oC VGS = -10 V, ID = -8 A TJ = 125C VGS = -4.5 V, ID = -6.3 A
o
-30 -22 -1 -10 100 -100
V mV /oC A A nA nA
BVDSS/TJ
IDSS IGSS IGSS VGS(th)
Gate - Body Leakage Current Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage Gate Threshold Voltage Temp.Coefficient Static Drain-Source On-Resistance
-1
-1.7 4 0.0155 0.021 0.022
-3
V mV /oC
VGS(th)/TJ
RDS(ON)
0.019 0.03 0.028
ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd
On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VGS = -10 V, VDS = -5 V VDS = -10 V, ID = -3.2 A VDS = -15 V, VGS = 0 V, f = 1.0 MHz
-50 25 2010 590 260
A S pF pF pF 22 27 140 80 30 ns ns ns ns nC nC nC
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS (Note 2)
VDD = -15 V, ID = -1 A, VGS = -10V, RGEN = 6
12 15 100 55
VDS = -15 V, ID = -8 A, VGS = 5 V
21 6 8
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS VSD
Notes:
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.67 A
(Note 2)
-0.67 -0.7 -1.2
A V
1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a. 70OC/W on a 1 in2 pad of 2oz copper.
b. 125OC/W on a 0.026 in2 of pad of 2oz copper.
c. 135OC/W on a 0.005 in2 of pad of 2oz copper.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
FDR858P Rev.C
Typical Electrical Characteristics
60 - I D , DRAIN-SOURCE CURRENT (A)
R DS(on) , NORMALIZED
48
-6.0V -4.5V -4.0V
DRAIN-SOURCE ON-RESISTANCE
V GS = -10V
2.5
2
VGS= -3.5 V -4.0V
36
-3.5V
24
1.5
-4.5V -5.5V -7.0V
12
-3.0V
1
-10V
0 0 1 2 3 4 5 - VDS , DRAIN-SOURCE VOLTAGE (V)
0.5 0 10 20 30 40 50 - I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE
0.08
R DS(ON) ON-RESISTANCE (OHM) ,
1.4
ID = -8.0A VGS = -10V
ID = -4.0A
0.06
R DS(ON), NORMALIZED
1.2
0.04
1
TA = 125 C
0.02
0.8
25 C
0 0 2 4 6 8 10 - VGS , GATE TO SOURCE VOLTAGE (V)
0.6 -50
-25
0
25
50
75
100
125
150
TJ , JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
50
50
TJ = -55C
125C 25C
-I S , REVERSE DRAIN CURRENT (A)
V DS = -5V
- I D , DRAIN CURRENT (A) 40
VGS = 0V
10 1 0.1 0.01 0.001 0.0001
30
TJ = 125C 25C -55C
20
10
0 1 2 3 4 5 -VGS , GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDR858P Rev.C
Typical Electrical Characteristics (continued)
10 -V GS , GATE-SOURCE VOLTAGE (V)
4000
I D = -8A
VDS = -5V -15V
-10V
CAPACITANCE (pF) 2000
8
Ciss
6
1000
4
Coss
500
2
200 0.1
f = 1 MHz VGS = 0 V
0.3 1 3
C rss
10 15 30
0 0 8 16 24 32 40 Q g , GATE CHARGE (nC)
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
80 20 5
N S(O )L IM IT
100 us
1m s 10m s 10 0m s 1s 10s DC
POWER (W)
50
- ID, DRAIN CURRENT (A)
RD
40
SINGLE PULSE R JA= 135C/W TA = 25C
30
0.5
20
0.05 0.01 0.1
VGS = -10V SINGLE PULSE RJA = 135C/W A T = 25C A
0.2 0.5 1 2
10
5
10
20 30
50
0 0.0001
0.001
0.01
0.1
1
10
100 300
- VDS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5 0.3 0.2 0.1 0.05 0.03 0.02 0.01 0.0001
D = 0.5
0.2 0.1 0.05 0.02 0.01 Single Pulse
R JA (t) = r(t) * RJA R JA = 135C/W
P(pk)
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t 1/ t 2
0.01 0.1 t 1, TIME (sec) 1 10 100 300
0.001
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.
FDR858P Rev.C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging Configuration: Figure 1.0
Customized Label
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipat ive (carbo n filled) po ly carbon ate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped w ith 3,000 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 unit s per 7" or 177cm diameter reel. This and some other options are further described in the Packagin g Information table. These full reels are in di vidu ally barcod e labeled and placed inside a standard intermediate box (ill ustrated in figure 1.0) made of recyclable corrugated brow n paper. One box contains two reels maximum. And t hese boxes are placed ins ide a barcode labeled shipp ing bo x whic h comes in di fferent sizes depend in g on t he nu mber of parts shippe d.
F63TNR Label Anti static Cover Tape
Static Dissi pat ive Emboss ed Carrier Tape
F852 831N F852 831N F852 831N F852 831N F852 831N
Pin 1
SSOT-8 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
D84Z TNR 500 7" Dia 184x187x47 1,000 0.0416 0.0980
TNR 3,000 13" D ia 343x64x343 6,000 0.0416 0.5615
SSOT-8 Unit Orientation
343mm x 342mm x 64mm Intermediate box for Standar d and L99Z Opti ons
F63TNR Label
F63TNR Label
F63TNR Labe l sa mpl e 184mm x 187mm x 47mm Pizza Box fo r D84Z Option F63TNR Label
LOT: CBVK741B019 FSID: FDR835N QTY: 3000 SPEC:
SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Components Traile r Tape 300mm mi nimum or 38 empty pockets Lead er Tape 500mm mi nimum or 62 empty poc kets
August 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0
T E1 P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-8 (12mm)
A0
4.47 +/-0.10
B0
5.00 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.50 +/-0.10
E1
1.75 +/-0.10
E2
10.25 mi n
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.280 +/-0.150
Wc
9.5 +/-0.025
Tc
0.06 +/-0.02
Notes : A0, B0, and K0 dimensions are deter mined with r espec t to t he EIA/Jedec RS-481 rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Si de or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-8 Reel Configuration: Figur e 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
5.906 150 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOTTM-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

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