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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
September 2009
FDD8426H
Dual N & P-Channel PowerTrench(R) MOSFET
N-Channel: 40 V, 12 A, 12 m P-Channel: -40 V, -10 A, 17 m Features
Q1: N-Channel Max rDS(on) = 12 m at VGS = 10 V, ID = 12 A Max rDS(on) = 15 m at VGS = 4.5 V, ID = 11 A Q2: P-Channel Max rDS(on) = 17 m at VGS = -10 V, ID = -10 A Max rDS(on) = 27 m at VGS = -4.5 V, ID = -8.3 A 100% UIL Tested RoHS Compliant Inverter H-Bridge
General Description
These dual N and P-Channel enhancement mode Power MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench(R) process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance.
Applications
D1 D1/D2
D2
G1 G2 S2 G1 S1 Dual DPAK 4L S1 N-Channel
G2
S2 P-Channel
MOSFET Maximum Ratings TC = 25C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current - Continuous (Package Limited) ID - Continuous (Silicon Limited) - Continuous - Pulsed Power Dissipation for Single Operation PD EAS TJ, TSTG Single Pulse Avalanche Energy Operating and Storage Junction Temperature Range TC = 25C (Note 1) TA = 25C (Note 1a) TA = 25C (Note 1b) (Note 3) 112 TC = 25C TA = 25C Q1 40 20 17 56 12 40 56 3.1 1.3 162 mJ C -55 to +150 Q2 -40 20 -17 -48 -10 -40 65 W A Units V V
Thermal Characteristics
RJC RJC Thermal Resistance, Junction to Case, Single Operation for Q1 Thermal Resistance, Junction to Case, Single Operation for Q2 (Note 1) (Note 1) 1.4 1.4 C/W
Package Marking and Ordering Information
Device Marking FDD8426H Device FDD8426H Package TO-252-4L
1
Reel Size 13"
Tape Width 12mm
Quantity 2500units
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(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 A, VGS = 0 V ID = -250 A, VGS = 0 V ID = 250 A, referenced to 25 C ID = -250 A, referenced to 25 C VDS = 32 V, VGS = 0 V VDS = -32 V, VGS = 0 V VGS = 20 V, VDS = 0 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 40 -40 35 -32 1 -1 100 100 V mV/C A nA nA
On Characteristics
VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 A VGS = VDS, ID = -250 A ID = 250 A, referenced to 25 C ID = -250 A, referenced to 25 C VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 11 A VGS = 10 V, ID = 12 A, TJ = 125 C VGS = -10 V, ID = -10 A VGS = -4.5 V , ID = -8.3 A VGS = -10 V, ID = -10 A, TJ = 125 C VDD = 5 V, ID = 12 A VDD = -5 V, ID = -10 A Q1 Q2 Q1 Q2 Q1 1.5 -1.5 2 2 -6 6 9.3 11 14 13 19 19 53 31 12 15 22 17 27 30 3.0 -3.0 V mV/C
rDS(on)
Static Drain to Source On Resistance
m
Q2 Q1 Q2
gFS
Forward Transconductance
S
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Q1 VDS = 20 V, VGS = 0 V, f = 1MHZ Q2 VDS = -20 V, VGS = 0 V, f = 1MHZ Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 2055 1900 255 330 165 200 1.1 3.3 2735 2650 335 440 245 300 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg(TOT) Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain "Miller" Charge Q1 VDD = 20 V, ID = 12 A, VGS = 10 V, RGEN = 6 Q2 VDD = -20 V, ID = -10 A, VGS = -10 V, RGEN = 6 VGS = 0 V to 10 V Q1 VGS = 0 V to -10 V V = 20 V, DD VGS = 0 V to 5 V ID = 12 A VGS = 0 V to -5 V Q2 VDD = -20 V, ID = -10 A Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 9.7 9.7 4.9 6.9 27 32 3.7 7.5 38 37 20 20 6.3 6.6 7.1 8 20 20 10 14 43 51 10 15 53 52 28 28 ns ns ns ns nC nC nC nC
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
VSD trr Qrr
Notes: 1. RJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design.
Source-Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
VGS = 0 V, IS = 12 A VGS = 0 V, IS = -10 A Q1 IF = 12 A, di/dt = 100 A/s Q2 IF = -10 A, di/dt = 100 A/s
(Note 2) (Note 2)
Q1 Q2 Q1 Q2 Q1 Q2
0.8 -0.8 22 25 11 14
1.2 -1.2 35 40 20 22
V ns nC
Q1
a. 40 C/W when mounted on a 1 in2 pad of 2 oz copper
b. 96 C/W when mounted on a minimum pad of 2 oz copper
Q2
a. 40 C/W when mounted on a 1 in2 pad of 2 oz copper
b. 96 C/W when mounted on a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3. Starting TJ = 25 C, N-ch: L = 1 mH, IAS = 15 A, VDD =36 V, VGS = 10 V; P-ch: L = 1 mH, IAS = -18 A, VDD = -36 V, VGS = -10 V.
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted
40
VGS = 6 V ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V
2.5
30
2.0
VGS = 3.5 V VGS = 4.5 V VGS = 6 V
20
VGS = 4.5 V VGS = 4 V
1.5
VGS = 4 V
10
VGS = 3.5 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1.0
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 10 V
0 0.0
0.5 0 10 20 30 40
ID, DRAIN CURRENT (A)
0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V)
2.0
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
1.8
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
300
SOURCE ON-RESISTANCE (m)
ID = 12 A VGS = 10 V
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1.5
rDS(on), DRAIN TO
ID = 12 A
200
TJ = 125 oC
1.2
100
TJ = 25 oC
0.9
0.6 -75
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
0 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs Junction Temperature
40
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
IS, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance vs Gate to Source Voltage
40 10
VGS = 0 V
ID, DRAIN CURRENT (A)
30
VDS = 5 V TJ = 150 oC
TJ = 150 oC
1
20
TJ = 25 oC
0.1
TJ = 25 oC
10
TJ = -55 oC
0.01
TJ = -55 oC
0 1 2 3 4
VGS, GATE TO SOURCE VOLTAGE (V)
0.001 0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE (V) ID = 12 A VDD = 10 V VDD = 20 V CAPACITANCE (pF)
5000
Ciss
8 6
VDD = 30 V
1000
4 2 0 0 10 20 30 40
Qg, GATE CHARGE (nC)
Coss
f = 1 MHz VGS = 0 V
Crss
100 0.1
1
10
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
80
ID, DRAIN CURRENT (A)
20
IAS, AVALANCHE CURRENT (A)
10
60
VGS = 10 V
TJ = 25 TJ = 125 oC
oC
40
VGS = 4.5 V
20
RJC = 1.4 C/W
o
TJ = 150 oC
1 0.01
0.1
1
10
100
0 25
50
75
100
o
125
150
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
100
P(PK), PEAK TRANSIENT POWER (W)
Figure 10. Maximum Continuous Drain Current vs Case Temperature
1000
SINGLE PULSE RJC = 1.4 oC/W TC = 25 oC
ID, DRAIN CURRENT (A)
100 us
10
THIS AREA IS LIMITED BY rDS(on)
1 ms 10 ms 100 ms 1s
1
SINGLE PULSE TJ = MAX RATED RJC = 1.4 oC/W TC = 25 oC
100
0.1 0.1
1
10
100 200
50 -4 10
10
-3
10
-2
10
-1
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL IMPEDANCE, ZJC
1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJc + TC
SINGLE PULSE RJC = 1.4 C/W
o
0.001 -4 10
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
2 1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
0.1
0.01
D = 0.5 0.2 0.1 0.05 0.02 0.01
P DM
t1
0.001
SINGLE PULSE RJA = 96 C/W
(Note 1b)
o
t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
-2
0.0001 -4 10
10
-3
10
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25 C unless otherwise noted
40
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
VGS = -10 V
3.0 2.5 2.0
VGS = -4.5 V VGS = -3.5 V VGS = -4 V
-ID, DRAIN CURRENT (A)
30
VGS = -6 V VGS = -4.5 V
20
VGS = -4 V
1.5
VGS = -6 V
10
VGS = -3.5 V
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1.0
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = -10 V
0 0 1 2 3 -VDS, DRAIN TO SOURCE VOLTAGE (V) 4
0.5 0 10 20 -ID, DRAIN CURRENT (A) 30 40
Figure 15. On- Region Characteristics
Figure 16. Normalized on-Resistance vs Drain Current and Gate Voltage
1.8
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
SOURCE ON-RESISTANCE (m)
80
ID = -10 A VGS = -10 V
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1.5
rDS(on), DRAIN TO
60
ID = -10 A
1.2
40
TJ = 125 oC
0.9
20
TJ = 25 oC
0.6 -75
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
0 2 4 6 8 10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. Normalized On-Resistance vs Junction Temperature
Figure 18. On-Resistance vs Gate to Source Voltage
40
-IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX -ID, DRAIN CURRENT (A)
40
VGS = 0 V
10
TJ = 150 oC
30
VDS = -5 V
1
TJ = 25 oC
20
TJ = 150 oC
10
TJ = 25 oC TJ = -55 oC
0.1
TJ = -55 oC
0 1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.01 0.2
0.4
0.6
0.8
1.0
1.2
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 19. Transfer Characteristics
Figure 20. Source to Drain Diode Forward Voltage vs Source Current
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25C unless otherwise noted
10
-VGS, GATE TO SOURCE VOLTAGE (V) ID = -10 A
5000
Ciss
CAPACITANCE (pF) VDD = -10 V
8 6
VDD = -20 V
1000
Coss
4
VDD = -30 V
2 0 0 10 20
Qg, GATE CHARGE (nC)
f = 1 MHz VGS = 0 V
Crss
30
40
100 0.1
1
10
40
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 21. Gate Charge Characteristics
Figure 22. Capacitance vs Drain to Source Voltage
60
-ID, DRAIN CURRENT (A)
20
-IAS, AVALANCHE CURRENT (A)
10
TJ = 25 oC
VGS = -10 V
40
VGS = -4.5 V
TJ = 125 oC
20
RJC = 1.4 C/W
o
TJ = 150 oC
1 0.01
0.1
1
10
100
500
0 25
50
75
100
o
125
150
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE ( C)
Figure 23. Unclamped Inductive Switching Capability
Figure 24. Maximum Continuous Drain Current vs Case Temperature
100
P(PK), PEAK TRANSIENT POWER (W) -ID, DRAIN CURRENT (A)
1000
SINGLE PULSE RJC = 1.4 C/W
o
100 us
10
THIS AREA IS LIMITED BY rds(on)
1 ms 10 ms 100 ms 1s
1
SINGLE PULSE TJ = MAX RATED RJC = 1.4 oC/W TC = 25 oC
100
0.1 0.1
1
10
100 200
50 -4 10
10
-3
10
-2
10
-1
-VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 25. Forward Bias Safe Operating Area
Figure 26. Single Pulse Maximum Power Dissipation
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 P-Channel) TJ = 25 C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
NORMALIZED THERMAL IMPEDANCE, ZJC
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC
0.1
SINGLE PULSE RJC = 1.4 C/W
o
0.05 -4 10
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
Figure 27. Junction-to-Case Transient Thermal Response Curve
2 1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
0.1
0.01
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1 t2
0.001
SINGLE PULSE RJA = 96 C/W
(Note 1b)
o
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
0.0001 -4 10
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (sec)
Figure 28. Junction-to-Ambient Transient Thermal Response Curve
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
Dimensional Outline and Pad Layout
(c)2009 Fairchild Semiconductor Corporation FDD8426H Rev.C
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FDD8426H Dual N & P-Channel PowerTrench(R) MOSFET
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. PowerTrench(R) AccuPowerTM FPSTM The Power Franchise(R) PowerXSTM Auto-SPMTM F-PFSTM (R) (R) Programmable Active DroopTM Build it NowTM FRFET SM (R) QFET Global Power Resource CorePLUSTM TinyBoostTM Green FPSTM QSTM CorePOWERTM TinyBuckTM Green FPSTM e-SeriesTM Quiet SeriesTM CROSSVOLTTM TinyCalcTM GmaxTM RapidConfigureTM CTLTM TinyLogic(R) GTOTM Current Transfer LogicTM (R) TINYOPTOTM IntelliMAXTM EcoSPARK TM TinyPowerTM EfficentMaxTM Saving our world, 1mW /W /kW at a timeTM ISOPLANARTM TinyPWMTM EZSWITCHTM* SmartMaxTM MegaBuckTM TinyWireTM TM* SMART STARTTM MICROCOUPLERTM (R) TriFault DetectTM SPM MicroFETTM TRUECURRENTTM* STEALTHTM MicroPakTM (R) SuperFETTM MillerDriveTM (R) Fairchild SuperSOTTM-3 MotionMaxTM Fairchild Semiconductor(R) SuperSOTTM-6 UHC(R) Motion-SPMTM (R) FACT Quiet SeriesTM Ultra FRFETTM SuperSOTTM-8 OPTOLOGIC FACT(R) OPTOPLANAR(R) UniFETTM SupreMOSTM (R) (R) FAST VCXTM SyncFETTM FastvCoreTM VisualMaxTM Sync-LockTM FETBenchTM XSTM (R)* PDP SPMTM (R)* FlashWriter Power-SPMTM
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handing and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification
Advance Information
Product Status
Formative / In Design
Definition
Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I41
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
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