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XRDAN30
Introduction !" # $% &

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Figure 2. Equivalent Circuit at Full Scale for AC Analysis
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Figure 3. Op Amp Open Loop Characteristics
Figure 1. Typical Configuration CMOS IOUT DAC with External Op Amp forming Voltage Output Configuration
,(% +4 2 R IN 20 Lo g ( ) R IN + Rf
Gain (dB)
R IN * R f x C O = 1 P2
Figure 4. Feedback Signal Path Transfer Characteristics

XRDAN30
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Figure 5. Root Locus
Figure 8. Op Amp Open Loop Characteristics
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Figure 9. Feedback Signal Path Transfer Characteristics
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Figure 6. Typical Zero Compensation of Co General Pole
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Figure 7. Equivalent Circuit at Full Scale for AC Analysis

XRDAN30
6 20 Lo g ( - -. -. - : +2 5 R A * R IN * R f x (C Z + C O) 6 "* R IN ) R IN + Rf ,(% +4 2
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Figure 14. Feedback Signal Path Transfer Characteristics Figure 11. Typical Zero Compensation of Co General Pole
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Figure 16. Typical Zero Compensation of Co General Pole
Figure 13. Op Amp Open Loop Characteristics
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XRDAN30
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