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 May 1997
NDH854P P-Channel Enhancement Mode Field Effect Transistor
General Description
SuperSOTTM-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
-5.1 A, -30 V. RDS(ON) = 0.032 @ VGS = -10 V RDS(ON) = 0.052 @ VGS = -4.5V. Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability.
____________________________________________________________________________________________
5 6 7 8
4 3 2 1
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD
T A = 25C unless otherwise noted
NDH854P -30 20
(Note 1a)
Units V V A
-5.1 -15
Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
1.8 1 0.9 -55 to 150
W
TJ,TSTG
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
70 20
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDH854P Rev.D
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -24 V, VGS = 0 V TJ = 55oC Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = -250 A TJ = 125oC Static Drain-Source On-Resistance VGS = -10 V, ID = -5.1 A TJ = 125oC VGS = -4.5 V, ID = -4.7 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = -10 V, VDS = -5 V VGS = -4.5 V, VDS = -5 V Forward Transconductance VDS = - 10 V, ID = -5.1 A VDS = -15 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 1220 735 290 pF pF pF -15 -5 12 S -1 -0.8 -1.4 -1.1 0.026 0.038 0.044 -30 -1 -10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -2 -1.6 0.032 0.057 0.052 A V
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -5.1 A, VGS = -10 V VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 15 16 72 48 39 4 8 30 30 140 95 55 ns ns ns ns nC nC nC
NDH854P Rev.D
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max -1.5
(Note 2)
Units A V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.5 A -0.74
-1.2
PD (t) =
T J -T A R JA(t)
=
T J -T A R JC +R CA(t)
= I 2 (t) x R DS(ON)@T J D
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 70oC/W when mounted on a 1 in2 pad of 2oz copper. b. 125oC/W when mounted on a 0.026 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.005 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDH854P Rev.D
Typical Electrical Characteristics
-20
2.5
V
GS
= -10V
I D , DRAIN-SOURCE CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
-6.0 -15
-5.0 -4.5 -4.0 -3.5
R DS(on), NORMALIZED
V GS = -3.5 V
2
-4.0 -4.5 -5.0
-10 -3.0 -5 -2.5 0 0
V
DS
1.5
-5.5
-6.0 -7.0 -10
1
-1
-2
-3
0.5 0 -5 -10 I D , DRAIN CURRENT (A) -15 -20
, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate Voltage and Drain Current.
1.6
2
I D = -5.1A
DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
1.5
DRAIN-SOURCE ON-RESISTANCE
1.4
V GS = -10V R DS(on) , NORMALIZED
TJ = 125C
R DS(ON), NORMALIZED
1.2
25C
1
1
-55C
0.5
0.8
0.6 -50
0
-25 0
J
25
50
75
100
125
150
0
-5 I
D
-10 , DRAIN CURRENT (A)
-15
-20
T , JUNCTION TEMPERATURE (C)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
-25
1.2
V DS = -5V
-20 I D, DRAIN CURRENT (A)
GATE-SOURCE THRESHOLD VOLTAGE
TJ =-55C 25C 125C
V GS(th), NORMALIZED
VDS = V
1.1
GS
I D = -250A
1
-15
0.9
-10
0.8
-5
0.7
0 -1 -1.5 -2 V
GS
-2.5 -3 -3.5 -4 , GATE TO SOURCE VOLTAGE (V)
-4.5
-5
0.6 -50
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (C)
J
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDH854P Rev.D
Typical Electrical Characteristics
1.08 DRAIN-SOURCE BREAKDOWN VOLTAGE
ID = -250A
-I , REVERSE DRAIN CURRENT (A) 1.06 1.04 1.02 1 0.98 0.96 0.94 -50
20 10
VGS = 0V
T J = 125C 25C -55C
1
BV DSS , NORMALIZED
0 .1
0 .0 1
0 .0 0 1
S
-25
0 25 50 75 100 T J , JUNCTION TEMPERATURE (C)
125
150
0 .0 0 0 1 0 0 .2 -V
SD
0 .4 0.6 0 .8 1 , BODY DIODE FORWARD VOLTAGE (V)
1 .2
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Current and Temperature.
4000 3000 -V GS , GATE-SOURCE VOLTAGE (V) 2000 CAPACITANCE (pF)
10
I D = -5.1A
8
V DS = -5V -10V -15V
Ciss
1000
6
Coss
500
4
f = 1 MHz
300 200 0 .1
V GS = 0 V
Crss
2
0 .2 -V
DS
0 .5 1 2 5 10 , DRAIN TO SOURCE VOLTAGE (V)
20
30
0 0 10 20 Q g , GATE CHARGE (nC) 30 40
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
-VDD V IN
D
ton
t off tr
90%
RL V OUT
t d(on)
t d(off)
90%
tf
VGS
VOUT
R GEN
10% G DUT
10% 90%
S
V IN
10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDH854P Rev.D
Typical Thermal Characteristics
, TRANSCONDUCTANCE (SIEMENS) 24
2.5
TJ = -55C 25C
STEADY-STATE POWER DISSIPATION (W)
V DS = - 5V
18
2
1a
1.5
12
125C
1
1b 1c
6
0.5
4.5"x5" FR-4 Board TA = 2 5 o C Still Air
g
FS
0 0 -4 -8 -12 -16 -20 ID , DRAIN CURRENT (A)
0 0
0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 )
1
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. SuperSOTTM-8 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
6 -I , STEADY-STATE DRAIN CURRENT (A)
30 10
1a
-I D, DRAIN CURRENT (A)
5
5 2 1 0.5
RD
S(O
N)
LIM
IT
10
1m
0u
s
10
10
s
0m
s
4
ms
1c 1b 4.5"x5" FR-4 Board
1s
VGS = -10V
0.1 0.05
3
TA = 2 5 C Still Air VG S = - 1 0 V
o
SINGLE PULSE R J A = See Note 1c T A = 25C A
10 s DC
D
2 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1
0.01 0.1
0.2
0.5 1 2 5 10 - V DS , DRAIN-SOURCE VOLTAGE (V)
20
30
50
Figure 15. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
Figure 16. Maximum Safe Operating Area.
1 TRANSIENT THERMAL RESISTANCE 0 .5 0 .3 0 .2 0 .1 0.05
0.02 0.2 0.1 0.05 D = 0.5
r(t), NORMALIZED EFFECTIVE
R JA (t) = r(t) * R JA R JA = See Note 1c
P(pk)
t1 TJ - T
t2
0.03 0.02 0.01 0 .0 0 0 1
0.01 Single Pulse
= P * R JA (t) Duty Cycle, D = t 1 / t 2
A
0 .001
0 .0 1
0 .1 t 1, TIME (sec)
1
10
100
300
Figure 17. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.
NDH854P Rev.D
NDH854P Rev.D
NDH854P Rev.D


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