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Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Features
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Functional Description
The TCMD0110G has been designed to drive electroabsorption modulators (EAMs), electroabsorption modulated lasers (EMLs), Mach-Zehnder (M-Z) lithium niobate modulators, and direct modulated lasers (DMLs) that have a 50 input impedance at speeds up to 12.5 Gbit/s NRZ. For nonclocked applications, a clock disable pin is provided. The driver consists of an input buffer, a limiting amplifier, a selectable data retiming section, a pulse width control circuitry, an output buffer with adjustable modulation level, and a dc offset section to provide a mark level adjustment. The output buffer is designed to provide 3 V of modulation to a 50 load at each output. The dc offset adjustment networks provide down to -1.5 V offset (see Figure 7). The dc offset for the unused output can be disabled to minimize power consumption (see Table 1). The input data is retimed using an integrated flip-flop to remove incoming pattern dependent jitter. This feature is enabled using a clock select pad (see Table 1). If no clock is available, the TCMD0110G can be operated in a nonclocked mode. The unused output can be terminated through the integrated 50 resistor when using the die form of the product (see Table 1).
Note: This advance data sheet serves as a product description and reflects design objectives and conceptual characteristics. Specifications may be incomplete and, along with functionality, packaging, and pin functions, are subject to change. The devices have not been extensively characterized and final specifications may not correspond to advanced data sheet values.
Operation to 12.5 Gbits/s NRZ. Internal optional retiming flip-flop to minimize output data pattern jitter. Adjustable output amplitude up to 3 V (RL = 50 ). Integrated dc level adjustment to -1.5 V Complementary data and clock inputs, and data output. Complete operation and control with single -5.2 V power supply. 28 ps rise and fall time (20%--80%). 2 ps typical rms jitter (clocked mode). Clock disable mode for data feed-through. Optional 50 on-chip termination for unused output (die form only). Single or dual-pin pulse width adjust 80 ps-- 120 ps. Available in die form or a 32-pin microlead frame package.
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Applications
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Optical transmitters. Digital video transmission. SONET/SDH test equipment. SONET/SDH OC-192/STM-64 transmission systems. 10.7 Gbits/s and 12.5 Gbits/s forward error correction (FEC). 10G Ethernet 10.3125 Gbits/s.
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Functional Description (continued)
GND
VBIAS
VSSBP dc OFFSET ADJUST NETWORK DOUTP 50
62 DATAP DATAN 62 INPUT BUFFER D D CK CK 62 CLKP CLKN 62 3.7 k CLOCK ENABLE CONTROL 1.5 K 1 k 1 3.7 k 1.5 K Q Q E PULSE WIDTH CONTROL
GAIN STAGE OUTPUT BUFFER
TRM
100
50 100
TRMB
DOUTN dc OFFSET ADJUST NETWORK
CKSEL
PWP
PWN
VSS1 VSSR VSS2 VMOD
VSSBN
2638(F)
Figure 1. TCMD0110G Block Diagram Table 1. Functional Description of Selected Pads Pad Name CKSEL VSSBP VSSBN TRM TRMB Function -5.2 V = enable, float = disable Float when not using DOUTP Float when not using DOUTN Ground to terminate unused DOUTP Ground to terminate unused DOUTN
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Die Layout
Dimensions are in m.
2639(F)
Figure 2. TCMD0110G Pad Layout
Agere Systems Inc.
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Die Layout (continued)
Table 2. Die Pad Description Pad Number 1, 3, 5, 7, 9 2 4 6 8 10 11 12 13 14 15 16 17 18 19 21 22 23 24 Symbol GND CLKN CLKP DATAN DATAP PWP PWN VSS1 VSS2 VSSR VSSBN VSSBP VMOD VBIAS CKSEL DOUTP TRM TRMB DOUTN Description Ground Complementary clock input Clock input Complementary data input Data input Pulse width control positive Pulse width control negative Supply voltage Supply voltage for output buffer Modulation voltage sense Supply voltage for DOUTN mark level adjustment network Supply voltage for DOUTP mark level adjustment network Modulation amplitude control voltage Mark level control voltage Clock select Data output Ground pad for termination resistor of unused DOUTP Ground pad for termination resistor of unused DOUTN Complementary data output
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Package Layout
CLKN CLKP GND GND GND GND NC NC 25 24
GND DOUTN GND GND DOUTP GND NC CKSEL
1
32
GND DATAN GND GND DATAP GND PWP
8 16 9
17
PWN
VBIAS
VMOD
VSSBN
VSSR
NC
VSS2
Figure 3. Package Layout of TCMD0110G (Top View) Table 3. Micro-Lead Frame Package Pin-out for TCMD0110G Pin Number 1, 3, 4, 6, 19, 21, 22, 24, 26, 28, 29, 31 2 5 7, 14, 25, 32 8 9 10 11 12 13 15 16 17 18 20 23 27 30 Agere Systems Inc. Symbol GND DOUTN DOUTP NC CKSEL VBIAS VMOD VSSBP VSSBN VSSR VSS2 VSS1 PWN PWP DINP DINN CLKP CLKN Ground Complementary data output Data output Not connected, Intended for future use Clock select Mark level control voltage Modulation amplitude control voltage Supply voltage for DOUTP mark level adjustment network Supply voltage for DOUTN mark level adjustment network Modulation voltage sense Supply voltage for output buffer Supply voltage Pulse width control negative Pulse width control positive Data input Complementary data input Clock input Complementary clock input 5 Description
VSSBP
VSS1
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Powerup Sequence
The control voltages VMOD, PWP, PWN and VBIAS must be referenced to Vss. To avoid damage to the device, power should be applied to the pins simultaneously or in the following sequence: 1. VSS1, VSS2 and VMOD simultaneously, or VSS1 then VMOD then VSS2, or VMOD then VSS1 then VSS2 (in the latter case, a current limit of 3 mA must be applied to VMOD). b) VBIAS then VSSBP and/or VSSBN with a current limit of 3 mA applied to VBIAS 3. a) Adjust VMOD to achieve desired output amplitude. b) Adjust VBIAS to get desired offset. 4. 5. PWP and PWN. Adjust PWP and PWN to position the eye crosspoint
2. a) VSSBP and/or VSSBN and VBIAS simultaneously.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods of time can adversely affect device reliability. Unless otherwise specified, maximum ratings apply to both die and packaged product. Table 4. Absolute Maximum Ratings Parameter Storage Temperature Supply Voltage Supply Current Input Voltage Output Voltage Modulation Control Voltage Offset Control Voltage Pulse Width Control Voltage Modulation Current Symbol Tstg Vss Iss VDATAP, VDATAN VDOUTP, VDOUTN VMOD VBIAS VPWP, VPWN IVMOD Min -40 -5.5 -- -2.0 -4.1 Vss - 0.5 Vss - 0.5 Vss - 0.5 -3 Max 125 0 400 0.5 0.5 Vss + 1.5 Vss + 2.5 Vss + 2.5 3 Unit C V mA V V V V V mA
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD) during handling and mounting. Agere Systems Inc. employs a human-body model (HBM) and a charged device module (CDM) for ESD susceptibility testing and protection design evaluation. Our method complies with the EOS/ESD association standard for ESD sensitivity testing for CDM. Device TCMD0110G Voltage TBD
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Recommended Operating Conditions
Table 5. Recommended Operating Conditions Parameter Data Rate Supply Voltage Operating Case Temperature Data Input Signal Symbol -- VSS TCASE Conditions NRZ -- -- Min -- -5.5 0 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 -- Vss Vss Typ -- -- -- -- -- -- -- -- -- -- -- TBD -- -- -- -- Max 10.7 -5.0 85 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 -- Vss + 1.0 Vss + 2.0 Vss + 2.0 Vss + TBD Unit Gbits/s V C Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p ps V V V V
Clock Input Signal
Input Data to Clock Setup and Hold Time Modulation Current Control Voltage Offset Level Control Voltage Pulse Width Control Voltage Clock Select Signal
VDATAP, VDATAN ac coupled, single-ended ac coupled, differential dc coupled, single-ended dc coupled, differential VCLKP, VCLKN ac coupled, single-ended ac coupled, differential dc coupled, single-ended dc coupled, differential tS, tH See Figure 8 VMOD VBIAS VPWP, VPWN VCSEL VMOD referenced VSS VBIAS referenced Vss
PWP and PWN referVss + 1.0 enced to Vss CSEL referenced to Vss Vss
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Electrical Characteristics
Table 6. Electrical Characteristics TAMBIENT = 25 C, RL = 50 , VSS = -5.2 V, VIN = 600 mVp-p, clock enabled, VCLK = 600 mVp-p, both data and clock single-ended ac coupled. Bit rate = 9.95328 Gbits/s NRZ and the data pattern = 231 - 1 PRBS. Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering evaluation. Typical values are for information purposes only and are not part of the testing requirements. Parameter Maximum Output Signal Amplitude Maximum Output Signal Amplitude with dc Offset Minimum Output Signal Amplitude Data Output High Output Offset Voltage Minimum MOD Rise/Fall Time Symbol VAMP VAMP Conditions RL = 50 , VBIAS = Vss RL = 50 , V Offset = -1.0 V Min 3.0 2.5 Typ -- -- Max -- -- Unit V V
VAMP VDOUT, H VOFFSET TR/TF
Maximum Pulse Width Minimum Pulse Width Pulse Width Control Input Output Voltage Overshoot Phase Margin Jitter (RMS)* Supply Current
RMS = ( J RMS, DUT ) * See Figure 7. J 2 - (J
PW PW PWP VOSLOW VOSHIGH -- -- ISS
RL = 50 , VBIAS = Vss, VMOD -- = Vss RL = 50 , VBIAS = Vss -600 RL = 50 , -- VBIAS = VSS + 2.0 V 20--80%; RL = 50 , -- VAMP = 3.0 Vp-p, VBIAS = Vss -- 120 -- -- 80 ps pulse width for mark at VSS + 1.0 VSS + 1.0; 120 ps at VSS + 2.0 VAMP > 2.0 V -10 -- Clock enabled mode Clock disabled mode Output amp = 2.5 Vp-p Output offset = -1.0 V -- -- -- --
-- -- -- --
1.5 0.0 -1.5 35
V mV V ps
-- -- -- -- TBD -- -- --
-- 80 VSS + 2.0 +10 -- 3 5 300
ps ps V % Deg ps ps mA
RMS, SYSTEM
)
2
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Electrical Characteristics (continued)
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Dout Amplitude (Vp-p)
3
2
1
0 -5.1
-4.9
-4.7
-4.5
-4.3
-4.1
Vmod (volts)
Figure 4. VMOD Vs. DOUT
0
dc Offset (volts)
-0.4
-0.8
-1.2
-1.6 -5.5
-5.1
-4.7
-4.3
-3.9
-3.5
VBIAS (volts)
Figure 5. Offset Vs. VBIAS
Agere Systems Inc.
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Electrical Characteristics (continued)
140
Pulse Width (ps)
120
100
80
60 -4.2
-4.0
-3.8
-3.6
-3.4
-3.2
PWP/PWN
Figure 6. PWP/PWN Vs. Pulse Width
0.0 -1.0
Volts
Maxim um V AMP
Output High (Offset)
-2.0 -3.0 -4.0 -1.5 -1.0 -0.5 0.0
Output Offset Voltage (Volts)
Output Low Maximum Vamp
Figure 7. Available Output Amplitude as a Function of Offset Voltage
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Timing Requirements
CLKP* VPP = 0.5 V--1.0 V CLKN
tS DINP
tH
VPP = 0.5 V--1.0 V DINN
1620(F).a
* The active edge will be the rising edge of the CLKP
Figure 8. Input Data to Clock Setup and Hold Time
Chip Visual Inspection Criteria
At 100x the chips will be visually free of the following defects:
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Scratches in the metallization (including air-bridges) that leave less than 50% of the original width undisturbed and distort the outline of the metal feature. Voids or missing metallization that leave less than 50% of the original width undisturbed. Extra metals that bridge adjacent same-layer metal features. This includes bond pads damaged from probing. Cracks or chips out that extend into the active area of the device. Damaged air-bridges that have been distorted or torn off. Particles on the surface of the chip that are large enough to bridge between bond pads. Stains larger than the size of a bond pad. Lifted or blistered metallization. Missing nitride that occurs over or under an active feature. Defects to bond pad area: -- Stains larger than 25% of bond pads. -- Extra nitride on the bond pad that reduces the open area by more than 25%. -- Probe damage that removes more than 25% of the bond pad. -- Probe damage that causes cracks in the surrounding nitride substrate.
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Agere Systems Inc.
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
On Wafer Results
-1V
500 mV/div
20 ps/div
Figure 9. Electrical Eye Diagram of Clocked (CKSEL = -5.2 V) TCMD0110G Output with a -1 V Offset and 2.5 V Amplitude
-1V
500 mV/div
30 ps/div
Figure 10. Electrical Eye Diagram with Pulse Adjusted for Greater than 120 ps Pulse Width (PWP = VSS + 2 V)
-1V
500 mV/div
30 ps/div
Figure 11. Electrical Eye Diagram with Pulse Width Adjusted for Less than 80 ps Pulse Width (PWP = VSS + 1 V) 12 Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Results of TCMD0110G Driving an Agere E2580 Type Electroabsorption Modulated Laser (EML)
220 W/div
20 ps/div
Figure 12. Optical Eye Diagram with 1.0 V Input to TCMD0110G
220 W/div
20 ps/div
Figure 13. Optical Eye Diagram with 0.5 V Input to TCMD0110G
Agere Systems Inc.
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Agere Bonding Parameters
Parameters in Table 7 have been provided as a reference for die applications. They represent parameters used at Agere Systems and some or all may be process and bonder dependent. They are not intended to indicate universal settings that should be used for every process and/or bonder. Table 7. Bonding Parameters Used at Agere Systems Parameter Wire bonder Bondsite temperature Bond wire Capillary Ball bond parameters Wedge bond parameters EFO parameters Wire pull strength Ball sheer Specifications ESEC 3018 150 C 10 C 99.99% Gold, .001 in diameter, 3-6% elongation UTS-38EE-CM-1/16-XL (from SPT), hole size = 38 m (1.5 mils), tip diameter = 130 m (5.1 mils), chamfer diameter = 58 m (2.3 mils) Force = 450 mN, US time = 12 ms, US power = 20% Force = 550 mN, US time = 15 ms, US power = 25% FAB size = 60 m (1.3 ms spark time, 34.04 uA current) Range = 7.0--12.0 gf, Agere spec = min 5.0 gf Range = 45--65 gf, Agere spec = 35 gf
Mounting and Connections
The TCMD0110G package is a 32-pin MicroLeadFrameTM (MLF) package. The package is a near CSP (chip scale package) plastic encapsulated with a copper leadframe substrate. This package is leadless and electrical contacts are made by soldering lands on the bottom surface to the printed-circuit board (PCB). Since the package does not include traditional formed gull-wing leads, a soldering iron cannot be used to solder the package to the PCB. Instead, solder paste must be printed onto the PCB and then reflowed after component placement. The temperature during solder re-flow should not exceed 220 C and the time above liquids should be less than 75 seconds. There is a die attach paddle on the bottom that facilitates heat dissipation from the die to the PCB. For effective heat conduction, the PCB must have features to effectively conduct heat away from the package. This can be achieved by incorporating a thermal pad and thermal vias on the PCB. While a thermal pad will provide a solderable surface on the top of the PCB for better grounding, thermal vias are needed to provide a thermal path to inner and/or bottom layers of the PCB to remove the heat. Heat could further be transferred into the module case by including a thermal pad on the opposite side of the PCB, directly under the device, and building a pedestal into the case to make contact with the thermal pad. The die attached paddle is at ground potential.
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Agere Systems Inc.
Advanced Data Sheet April 01, 2002
TCMD0110G 10 Gbits/s Clocked Modulator Driver
Package Dimensions
32- Pin MLF Package
2X A D D/2 D1 D1/2 2X 0.25 C 5 6 0.50 DIA. B e
1 2 3
0.25 C
A C C CL
TERMINAL TIP
E1/2
E/2
VIEW FOR EVEN TERMINAL/SIDE
E1 E 4b
A1 11 0.20 C 2X 2X 8 C SEATING PLANE b D2 4X P 4X R D2/2 N 4X P 1 2 3 4X Q E2/2 A3 0.10 M C A B PIN1 ID 8 A1 B 0.20 C A A2 A B SECTION C-C
0.05 C
10
E2 (Ne-1)Xe REF.
L B (Nd-1)Xe REF.
0.35
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TCMD0110G 10 Gbits/s Clocked Modulator Driver
Advanced Data Sheet April 01, 2002
Package Dimensions (continued)
Table 8. Package Dimensions (in mm) Symbol Min A A1 A2 A3 D D1 E E1 q P R e N Nd Ne L B Q D2 E2 -- 0.00 -- Dimensions Nom 0.85 0.01 0.65 0.20 REF. 5.00 BSC 4.75 BSC 5.00 BSC 4.75 BSC 0.42 0.17 32 8 8 0.40 0.23 0.20 3.10 3.10 Max 1 0.05 0.8 -- 1 -- -- 4 4 4 4 -- -- -- -- 2 2 2 -- 3 -- -- -- Note
0.24 0.13 0.50 BSC
12 0.6 0.23
0.30 0.18 0.00 2.95 2.95
0.50 0.30 0.45 3.25 3.25
Notes: 1. Applied only for terminals. 2. N is the number of terminals. Nd is the number of terminals in x-direction. Ne is the number of terminals in y-direction. 3. Dimension b applies to plated terminal snd is measured between 0.20 mm and 0.25 mm from terminal tip. 4. BSC is a basic dimension without tolerance.
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Agere Systems Inc.
MicroLeadFrame is a trademark of Amkor Technology, Inc.
For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@agere.com N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA: Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon Tel. (852) 3129-2000, FAX (852) 3129-2020 CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen) JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 6778-8833, TAIWAN: (886) 2-2725-5858 (Taipei) EUROPE: Tel. (44) 7000 624624, FAX (44) 1344 488 045
Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application.
Copyright (c) 2002 Agere Systems Inc. All Rights Reserved
April 01, 2002 DS02-008HSPL

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