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PRELIMINARY PRODUCT SPECIFICATION
1
Z86C04/C08
CMOS 8-BIT LOW-COST 1K/2K-ROM MICROCONTROLLERS
FEATURES
Part Number Z86C04 Z86C08 ROM (KB) 1 2 RAM* Speed (Bytes) (MHz) 125 125 12 12 Auto Permanent Latch WDT Optional Optional Optional Optional - - -
s
1
Permanent Watch-Dog Timer (WDT) RC Oscillator 32 kHz Operation
Note: * General-Purpose s s s
Two Programmable 8-Bit Counter/Timers, Each with 6-Bit Programmable Prescaler Power-On Reset (POR) Timer On-Chip Oscillator that Accepts RC, Crystal, Ceramic Resonance, LC, or External Clock Drive Clock-Free WDT Reset Low-Power Consumption (50mw) Fast Instruction Pointer (1.0 s @ 12 MHz) Fourteen Digital Inputs at CMOS Levels; Schmitt-Triggered Software Enabled Watch-Dog Timer Programmable Interrupt Polarity Two Standby Modes: STOP and HALT Low-Voltage Protection
18-Pin DIP and SOIC Packages 3.0V to 5.5V Operating Range Available Temperature Ranges A = -40C to +125C E = -40C to +105C S = 0C to +70C 14 Input / Output Lines Six Vectored, Prioritized Interrupts from Six Different Sources Two On-Board Comparators
s s
s s s
s s
s
s s
s
ROM Mask Options: - Low Noise - ROM Protect - Auto Latch - System Clock Driving WDT (Z86C04 only)
s s s
GENERAL DESCRIPTION
Zilog's Z86C04/C08 are members of the Z8 (R) MCU singlechip microcontroller family which offer easy software/hardware system expansion. For applications demanding powerful I/O capabilities, the Z86C04/C08's dedicated input and output lines are grouped into three ports, and are configurable under software control to provide timing, status signals, or parallel I/O. Two on-chip counter/timers, with a large number of user selectable modes, off-load the system of administering real-time tasks such as counting/timing and I/O data communications. Additionally, two on-board comparators process analog signals with a common reference voltage (Figure 1).
DS97DZ80502
PRELIMINARY
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
GENERAL DESCRIPTION (Continued)
Note: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit
VCC
Device
VDD VSS
GND
Input
Vcc
GND
XTAL
Port 3
Machine Timing & Inst. Control
Counter/ Timers (2)
ALU
Interrupt Control
FLAG Prg. Memory Register Pointer Register File Program Counter
Two Analog Comparators
Port 2
Port 0
I/O (Bit Programmable)
I/O
Figure 1. Z86C04/C08 Functional Block Diagram
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Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
PIN DESCRIPTIONS
Table 1: 18-Pin DIP and SOIC Pin Identification
P24 P25 P26 P27 VCC XTAL2 XTAL1 P31 P32
1 2 3 4 5 6 7 8 9 DIP
18 17 16 15 14 13 12 11 10
P23 P22 P21 P20 GND P02 P01 P00 P33
Pin # 1-4 5 6 7 8 9 10 11-13 14 15-18
Symbol P24-P27 V CC XTAL2 XTAL1 P31 P32 P33 P00-P02 GND P20-P23
Function Port 2, Pins 4, 5, 6, 7 Power Supply Crystal Oscillator Clock Crystal Oscillator Clock Port 3, Pin 1, AN1 Port 3, Pin 2, AN2 Port 3, Pin 3, REF Port 0, Pins 0, 1, 2 Ground Port 2, Pins 0, 1, 2, 3
Direction In/Output Output Input Input Input Input In/Output In/Output
1
Figure 2. 18-Pin DIP Configuration
P24 P25 P26 P27 Vcc XTAL2 XTAL1 P31 P32
1 2 3 4 5 6 7 8 9
18 17 16 15
P23 P22 P21 P20 GND P02 P01 P00 P33
SOIC
14 13 12 11 10
Figure 3. 18-Pin SOIC Pin Configuration
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PRELIMINARY
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
ABSOLUTE MAXIMUM RATINGS
Parameter Ambient Temperature under Bias Storage Temperature Voltage on any Pin with Respect to VSS [Note 1] Voltage on VDD Pin with Respect to VSS Voltage on Pin 7 with Respect to VSS [Note 2] Total Power Dissipation Maximum Current out of VSS Maximum Current into VDD Maximum Current into an Input Pin [Note 3] Maximum Current into an Open-Drain Pin [Note 4] Maximum Output Current Sinked by Any I/O Pin Maximum Output Current Sourced by Any I/O Pin Total Maximum Output Current Sinked by Port 2 Total Maximum Output Current Sourced by Port 2 -600 -600 Min -40 -65 -0.7 -0.3 -0.7 Max +105 +150 +12 +7 V DD+1 462 84 84 +600 +600 12 12 70 70 Units C C V V V mW mA mA A A mA mA mA mA
Notes: 1. This applies to all pins except where otherwise noted. Maximum current into pin must be 600A. 2. There is no input protection diode from pin to VDD. 3. This excludes Pin 6 and Pin 7. 4. Device pin is not at an output Low state.
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an ex-
tended period may affect device reliability. Total power dissipation should not exceed 462 mW for the package. Power dissipation is calculated as follows: Total Power dissipation = VDD x [I DD - (sum of IOH)] + sum of [(V DD - VOH) x IOH ] + sum of (V 0L x I0L).
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to Ground. Positive current flows into the referenced pin (Figure 4).
From Output Under T est
150 pF
Figure 4. Test Load Diagram
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Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
CAPACITANCE TA = 25C, VCC = GND = 0V, f = 1.0 MHz, unmeasured pins returned to GND.
Parameter Input capacitance Output capacitance I/O capacitance Min 0 0 0 Max 15 pF 20 pF 25 pF
1
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +125C
Sym VCH
Parameter Clock Input High Voltage
VCC [4] 3.0V 5.5V
Min 0.8 VCC 0.8 VCC VSS-0.3 VSS-0.3 0.7 VCC 0.7 VCC VSS-0.3 VSS-0.3 VCC-0.4 VCC-0.4 VCC-0.4 VCC-0.4
Max VCC+0.3 VCC+0.3 0.2 VCC 0.2 VCC VCC+0.3 VCC+0.3 0.2 VCC 0.2 VCC
Typical @ 25C 1.7 2.8 0.8 1.7 1.8 2.8 0.8 1.5 3.0 4.8 3.0 4.8
Units V V V V V V V V V V V V V V V V V V mV mV V A A A A
Conditions Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator
Notes
VCL
Clock Input Low Voltage
3.0V 5.5V
VIH VIL VOH
Input High Voltage Input Low Voltage Output High Voltage
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
1 1 1 1 IOH = -2.0 mA IOH = -2.0 mA Low Noise @ IOH = -0.5 mA Low Noise @ IOH = -0.5 mA IOL = +4.0 mA IOL = +4.0 mA Low Noise @ IOL = 1.0 mA Low Noise @ IOL = 1.0 mA IOL = +12 mA IOL = +12 mA 5 5 5 5 5 5
VOL1
Output Low Voltage
3.0V 5.5V 3.0V 5.5V
0.8 0.6 0.6 0.6 1.2 1.0 25 25 3.0 1.0 1.0 1.0 1.0
0.2 0.1 0.2 0.1 0.8 0.3 10 10 2.6
VOL2 VOFFSET VLV IIL
Output Low Voltage Comparator Input Offset Voltage VCC Low Voltage Auto Reset Input Leakage (Input Bias Current of Comparator) Output Leakage
3.0V 5.5V 3.0V 5.5V 1.8 3.0V 5.5 3.0V 5.5V -1.0 -1.0 -1.0 -1.0
Int. CLK Freq @ 2 MHz Max. VIN = 0V, VCC VIN = 0V, VCC VIN = 0V, VCC VIN = 0V, Vcc
IOL
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DC ELECTRICAL CHARACTERISTICS (Continued)
VVICR Comparator Input Common Mode Voltage Range Supply Current 0 VCC -1.5 V
ICC
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
3.5 7.0 8.0 11.0 10 15 2.5 4.0 4.0 5.0 4.5 7.0 3.5 7.0 5.8 9.0 8.0 11.0
1.5 3.8 3.0 4.4 3.6 9.0 0.7 2.5 1.0 3.0 1.5 4.0 1.5 3.8 2.5 4.0 3.0 4.4
mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA
I
CC1
Standby Current
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
All Output and I/O Pins Floating @ 2 MHz All Output and I/O Pins Floating @ 2 MHz All Output and I/O Pins Floating @ 8 MHz All Output and I/O Pins Floating @ 8 MHz All Output and I/O Pins Floating @ 12 MHz All Output and I/O Pins Floating @ 12 MHz HALT mode VIN = 0V, VCC @ 2 MHz HALT mode VIN = 0V, VCC @ 2 MHz HALT mode VIN = 0V, VCC @ 8 MHz HALT mode VIN = 0V, VCC @ 8 MHz HALT mode VIN = 0V, VCC @ 12 MHz HALT mode VIN = 0V, VCC @ 12 MHz All Output and I/O Pins Floating @ 1 MHz All Output and I/O Pins Floating @ 1 MHz All Output and I/O Pins Floating @ 2 MHz All Output and I/O Pins Floating @ 2 MHz All Output and I/O Pins Floating @ 4 MHz All Output and I/O Pins Floating @ 4 MHz
5,7 5,7 5,7 5,7 5,7 5,7 5,7 5,7 5,7 5,7 5,7 5,7 7 7 7 7 7 7
I
CC
Supply Current (Low Noise Mode)
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
DC ELECTRICAL CHARACTERISTICS (Continued)
TA = -40C
Sym Parameter I
CC1
VCC [4] 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
to +125C Typical Min Max @ 25C Units 2.5 4.0 3.0 4.5 4.0 5.0 20 20 8.0 30 -5.0 -20 0.7 2.5 0.9 2.8 1.0 3.0 1.0 1.0 3.0 16 -1.5 -8.0
Conditions
Notes 7 7 7 7 7 7 7
Standby Current (Low Noise Mode)
mA HALT mode VIN = 0V, VCC @ 1MHz mA HALT mode VIN = 0V, VCC @ 1MHz mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 4 MHz mA HALT mode VIN = 0V, VCC @ 4 MHz A STOP mode VIN = 0V, VCC ;WDT is not Running A STOP mode VIN = 0V, VCC ;WDTis not Running A 0V < VIN < VCC A 0V < VIN < VCC A 0V < VIN < VCC A 0V < VIN < VCC
I
CC2
Standby Current
3.0V 5.5V
IALL IALH
Auto Latch Low Current 3.0V 5.5V Auto Latch High Current 3.0V 5.5V
Notes: 1. Port 0, 2, and 3 only. 2. VSS = 0V = GND. 3. The device operates down to VLV. The minimum operational VCC is determined on the value of the voltage VLV at the ambient temperature. The VLV increases as the temperature decreases. 4. VCC = 3.0V to 5.5V, typical values measured at VCC = 3.3V and VCC = 5.0V. 5. Standard Mode (not Low EMI mode). 6. Z86C08 only. 7. Inputs at power rail and outputs are unloaded.
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
DC ELECTRICAL CHARACTERISTICS (Continued)
TA= 0C to +70C Symbol VCH Parameter Clock Input High Voltage VCC Min Max TA= -40C to +105C Min Max Typical @ 25C Units 1.7 2.8 0.8 1.7 1.8 2.8 0.8 1.5 3.0 4.8 3.0 4.8 0.8 0.4 0.4 0.4 1.0 0.8 25 25 0.2 0.1 0.2 0.1 0.8 0.3 10 10 2.6 2.6 V V V V V V V V V V V V V V V V V V IOH = -2.0 mA IOH = -2.0 mA Low Noise @ IOH = -0.5 mA Low Noise @ IOH = -0.5 mA IOL= +4.0 mA IOL= +4.0 mA Low Noise @ IOL = 1.0 mA Low Noise @ IOL = 1.0 mA IOL = +12 mA IOL = +12 mA 5 5 5 5 Conditions Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator 1 1 1 1 5 5 Notes
3.0V 0.8 VCC VCC+0.3 0.8 VCC VCC+0.3 5.5V 0.8 VCC VCC+0.3 0.8 VCC VCC+0.3
VCL
Clock Input Low Voltage
3.0V VSS-0.3 0.2 VCC VSS-0.3 0.2 VCC 5.5V VSS-0.3 0.2 VCC VSS-0.3 0.2 VCC
VIH VIL VOH
Input High Voltage Input Low Voltage Output High Voltage
3.0V 0.7 VCC VCC+0.3 0.7 VCC VCC+0.3 5.5V 0.7 VCC VCC+0.3 0.7 VCC VCC+0.3 3.0V VSS-0.3 0.2 VCC VSS-0.3 0.2 VCC 5.5V VSS-0.3 0.2 VCC VSS-0.3 0.2 VCC 3.0V VCC-0.4 5.5V VCC-0.4 3.0V VCC-0.4 5.5V VCC-0.4 VCC-0.4 VCC-0.4 VCC-0.4 VCC-0.4 0.8 0.4 0.4 0.4 1.0 0.8 25 25 2.8 2.0
VOL1
Output Low Voltage
3.0V 5.5V 3.0V 5.5V
VOL2 VOFFSET VLV
Output Low Voltage Comparator Input Offset Voltage VCC Low Voltage Auto Reset
3.0V 5.5V 3.0V 5.5V 2.2
3.0 1.0 1.0 1.0 1.0 VCC-1.5
IIL
IOL VVICR
Input Leakage (Input Bias Current of Comparator) Output Leakage Comparator Input Common Mode Voltage Range
3.0V 5.5V 3.0V 5.5V
-1.0 -1.0 -1.0 -1.0 0
1.0 1.0 1.0 1.0 VCC-1.0
-1.0 -1.0 -1.0 -1.0 0
mV mV V Int. CLK Freq @ 6 MHz Max. V Int. CLK Freq @ 4 MHz Max. A VIN = 0V, VCC A VIN = 0V, VCC A VIN = 0V, VCC A VIN = 0V, VCC V
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
DC ELECTRICAL CHARACTERISTICS (Continued)
TA= 0C to +70C Symbol
Icc
TA= -40C to +105C Min Max 3.5
Typical @ 25C Units 1.5 Conditions Notes 5,7
Parameter Supply Current
VCC 3.0V
Min
Max 3.5
5.5V
7.0
7.0
3.8
3.0V
8.0
8.0
3.0
5.5V
11.0
11.0
4.4
3.0V
10
10
3.6
5.5V
15
15
9.0
I
CC1
Standby Current
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
2.5 4.0 4.0 5.0 4.5 7.0
2.5 4.0 4.0 5.0 4.5 7.0
0.7 2.5 1.0 3.0 1.5 4.0
mA All Output and I/O Pins Floating @ 2 MHz mA All Output and I/O Pins Floating @ 2 MHz mA All Output and I/O Pins Floating @ 8 MHz mA All Output and I/O Pins Floating @ 8 MHz mA All Output and I/O Pins Floating @ 12 MHz mA All Output and I/O Pins Floating @ 12 MHz mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 8 MHz mA HALT mode VIN = 0V, VCC @ 8 MHz mA HALT mode VIN = 0V, VCC @ 12 MHz mA HALT mode VIN = 0V, VCC @ 12 MHz
5,7
5,7
5,7
5,7
5,7
5,7 5,7 5,7 5,7 5,7 5,7
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DC ELECTRICAL CHARACTERISTICS (Continued)
TA= 0C to +70C Symbol I
CC
TA= -40C to +105C Min Max 3.5
Typical @ 25C Units 1.5 Conditions Notes 7
Parameter Supply Current (Low Noise)
VCC 3.0V
Min
Max 3.5
5.5V
7.0
7.0
3.8
3.0V
5.8
5.8
2.5
5.5V
9.0
9.0
4.0
3.0V
8.0
8.0
3.0
5.5V
11.0
11.0
4.4
mA All Output and I/O Pins Floating @ 1 MHz mA All Output and I/O Pins Floating @ 1 MHz mA All Output and I/O Pins Floating @ 2 MHz mA All Output and I/O Pins Floating @ 2 MHz mA All Output and I/O Pins Floating @ 4 MHz mA All Output and I/O Pins Floating @ 4 MHz
7
7
7
7
7
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CC1
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers TA= -40C to +105C Min Max 2.5 4.0 3.0 4.5 4.0 5.0 20
Typical @ 25C Units 0.7 2.5 0.9 2.8 1.0 3.0 1.0 Conditions Notes 5,7 5,7 5,7 5,7 5,7 5,7 7
Parameter Standby Current (Low Noise Mode)
VCC 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
Min
Max 2.5 4.0 3.0 4.5 4.0 5.0 10
1
mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 2 MHz mA HALT mode VIN = 0V, VCC @ 8 MHz mA HALT mode VIN = 0V, VCC @ 8 MHz mA HALT mode VIN = 0V, VCC @ 12 MHz mA HALT mode VIN = 0V, VCC @ 12 MHz A STOP mode VIN = 0V,Vcc WDT is not Running A STOP mode VIN = 0V,Vcc WDT is not Running A 0V < VIN < VCC A 0V < VIN < VCC A 0V < VIN < VCC A 0V < VIN < VCC
I
CC2
Standby Current
3.0V
5.5V
10
20
1.0
7
IALL IALH
Auto Latch Low Current Auto Latch High Current
3.0V 5.5V 3.0V 5.5V
12 32 -8 -16
8.0 30 -5.0 -20
3.0 16 -1.5 -8.0
Notes: 1. Port 0, 2, and 3 only. 2. VSS = 0V = GND. 3. The device operates down to VLV. The minimum operational VCC is determined on the value of the voltage VLV at the ambient temperature. The VLV increases as the temperature decreases. 4. VCC = 3.0V to 5.5V, typical values measured at VCC = 3.3V and VCC = 5.0V. 5. Standard Mode (not Low EMI mode). 6. Z86C08 only. 7. Inputs at power rail and outputs are unloaded.
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1
3
Clock
2 7 7 2 3
T IN
4 6 5
IRQ
N
8 9
Figure 5. AC Electrical Timing Diagram
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
AC ELECTRICAL CHARACTERISTICS Timing Table (Standard Mode for SCLK/TCLK = XTAL/2)
TA = -40C to +125C 8 MHz No 1 2 3 4 5 6 7 8 9 Symbol TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin, TtTin TwIL TwIH Parameter Input Clock Period Clock Input Rise and Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise and Fall Time Int. Request Input Low Time Int. Request Input High Time Watch-Dog Timer Delay Time Before Timeout Power-On Reset Time VCC 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V Min 125 125 Max DC DC 25 25 62 62 83 83 12 MHz Min Max DC DC 15 15 41 41 Units ns ns ns ns ns ns ns ns Notes 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1,2 1,2 1 1,2
1
100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 10 50 20 4 2 180 100 60 30
100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 10 50 20 4 2 180 100 60 30
ns ns ns ns
10 Twdt
ms ms ms ms ms ms 3 3 4 4
11 Tpor
Notes: 1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. 2. Interrupt request through Port 3 (P33-P31). 3. Z86C08. 4. Z86C04
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers TA= 0C to +70C No Symbol 1 TpC Parameter VCC 8 MHz Min Max 125 125 DC DC 25 25 12 MHz Min Max 83 83 DC DC 15 15 TA= -40C to +105C 8 MHz Min Max 125 125 DC DC 25 25 62 62
Zilog
12 MHz Min Max Units Notes 83 83 DC DC 15 15 41 41 ns ns ns ns ns ns ns ns 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1,2 1,2 1 1,2
Input Clock Period 3.0V 5.5V 2 TrC,TfC Clock Input Rise 3.0V and Fall Times 5.5V 3 TwC Input Clock Width 3.0V 5.5V 4 TwTinL Timer Input Low 3.0V Width 5.5V 5 TwTinH Timer Input High 3.0V Width 5.5V 6 TpTin Timer Input Period 3.0V 5.5V 7 TrTin, Timer Input Rise 3.0V TtTin and Fall Time 5.5V 8 TwIL Int. Request Input 3.0V Low Time 5.5V 9 TwIH Int. Request Input 3.0V High Time 5.5V 10 Twdt Watch-Dog Timer 3.0V Delay Time 5.5V Before Timeout 11 Tpor Power-On Reset 3.0V Time 5.5V 3.0V 5.5V
62 62 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 12 50 20 4 3 160 80 38 18
41 41 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 12 50 20 4 3 160 80 38 18
100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 10 50 20 4 2 160 80 38 18
100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 25 10 50 20 4 2 160 80 38 18
ns ns ns ns
ms ms ms ms ms ms 3 3 4 4
Notes: 1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. 2. Interrupt request through Port 3 (P33-P31). 3. Z86C08. 4. Z86C04
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AC ELECTRICAL CHARACTERISTICS Low Noise Mode (SCLK/TCLK = XTAL)
TA= -40C to +125C No 1 2 3 4 5 6 7 8 9 Symbol TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin, TtTin TwIL TwIH Parameter Input Clock Period Clock Input Rise and Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise and Fall Time Int. Request Input Low Time Int. Request Input High Time Watch-Dog Timer Delay Time Before Timeout VCC 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 1 MHz Min Max 1000 1000 DC DC 25 25 4 MHz Min Max 250 250 DC DC 25 25 Units ns ns ns ns ns ns ns ns Notes 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1,2 1,2 1 1,2 3 3
500 500 100 70 2.5TpC 2.5TpC 4TpC 4TpC 100 100 100 70 2.5TpC 2.5TpC 25 10
125 125 100 70 2.5TpC 2.5TpC 4TpC 4TpC 100 100 100 70 2.5TpC 2.5TpC 25 10
ns ns ns ns
10 Twdt
ms ms
Notes: 1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. 2. Interrupt request through Port 3 (P33-P31). 3. Internal RC Oscillator driving WDT.
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DS97DZ80502
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers TA= 0C to 70C 1 MHz No 1 2 3 4 5 6 7 8 9 10 VCC Symbol Parameter TpC Input Clock Period 3.0V 5.5V TrC,TfC Clock Input Rise 3.0V and Fall Times 5.5V TwC Input Clock Width 3.0V 5.5V TwTinL Timer Input Low Width 3.0V 5.5V TwTinH Timer Input High Width 3.0V 5.5V TpTin Timer Input Period 3.0V 5.5V TrTin, Timer Input Rise 3.0V TtTin and Fall Timer 5.5V TwIL Int. Request Input 3.0V Low Time 5.5V TwIH Int. Request Input 3.0V High Time 5.5V Twdt Watch-Dog Timer 3.0V Delay Time Before 5.5V Timeout Min 1000 1000 Max DC DC 25 25 4 MHz Min 250 250 TA= -40C to +105C 1 MHz Max DC DC 25 25 4 MHz Min 250 250 Max Min DC 1000 DC 1000 25 25 500 500 100 70 2.5TpC 2.5TpC 4TpC 4TpC 100 100 100 70 2.5TpC 2.5TpC 25 10
Zilog
500 500 100 70 2.5TpC 2.5TpC 4TpC 4TpC 100 100 100 70 2.5TpC 2.5TpC 25 12
125 125 100 70 2.5TpC 2.5TpC 4TpC 4TpC
125 125 100 70 2.5TpC 2.5TpC 4TpC 4TpC 100 100 100 70 2.5TpC 2.5TpC 25 10
100 70 2.5TpC 2.5TpC 25 12
Max Units Notes DC ns 1 DC ns 1 25 ns 1 25 ns 1 ns 1 ns 1 ns 1 ns 1 1 1 1 1 100 ns 1 100 ns 1 ns 1,2 ns 1,2 1 1,2 ms 3 ms 3
Notes: 1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. 2. Interrupt request through Port 3 (P33-P31). 3. Internal RC Oscillator driving WDT.
16
PRELIMINARY
DS97DZ80502
Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
LOW NOISE VERSION Low EMI Emission
The Z8 can be programmed to operate in a Low EMI emission mode by means of a mask ROM bit option. Use of this feature results in:
(R)
s s
Output drivers have resistances of 200 ohms (typical).
Oscillator divide-by-two circuitry eliminated. The Low EMI mode is mask-programmable to be selected by the customer at the time the ROM code is submitted.a
1
s s
All pre-driver slew rates reduced to 10 ns typical. Internal SCLK/TCLK operation limited to a maximum of 4 MHz - 250 ns cycle time.
APPLICATION PRECAUTIONS:
1. Emulator does not support the 32KHz operation. 2. For the Z86C04, the WDT only runs in Stop Mode if the permanent WDT option is selected and if the on-board RC oscillator is selected as the clock source for the WDT. 3. For the Z86C08, the WDT only runs in Stop Mode if the permanent WDT option is selected. 4. The registers %FE (GPR) and %FF (SPL) are reset to 00Hex after Stop Mode recovery or any reset. 5. Emulator does not support the system clock driving the WDT mask option.
DS97DZ80502
PRELIMINARY
17
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
PIN DESCRIPTION
XTAL1, XTAL2 Crystal In, Crystal Out (time-based input and output, respectively). These pins connect a RC, parallel-resonant crystal, LC, or an external single-phase clock to the on-chip clock oscillator and buffer. Auto Latch. The Auto Latch puts valid CMOS levels on all CMOS inputs (except P33, P32, P31) that are not externally driven. After Power-On Reset, this level is 0 or 1 cannot be determined. A valid CMOS level, rather than a floating node, reduces excessive supply current flow in the input buffer. To change the Auto Latch state, the auto latches must be over driven with current greater than IALH (high to low) or IALL (low to high). Port 0 (P02-P00). Port 0 is a 3-bit I/O, bidirectional, Schmitt-triggered CMOS compatible I/O port. These three I/O lines can be configured under software control to be all inputs or all outputs (Figure 7).
Z86E04 and Z86E08
Port 0 (I/O)
Open
PAD
Out 1.5 In 2.3 Hysteresis VCC @ 5.0V
Auto Latch Option
R
500 k
Figure 6. Port 0 Configuration
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PRELIMINARY
DS97DZ80502
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers Port 2 (P27-P20). Port 2 is an 8-bit I/O, bit programmable, bi-directional, Schmitt-triggered CMOS compatible I/O port. These eight I/O lines can be configured under soft-
Zilog ware control to be an input or output, independently. Bits programmed as outputs may be globally programmed as either push-pull or open-drain (Figure 8).
MCU
Port 2 (I/O)
Open Drain Open PAD
Out 1.5 In 2.3 Hysteresis Vcc @ 5.0V
Auto Latch R 500 k
Figure 7. Port 2 Configuration
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DS97DZ80502
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
PIN DESCRIPTION (Continued)
Port 3 (P33-P31). Port 3 is a 3-bit, Schmitt-triggered CMOS compatible port with three fixed input (P33-P31) lines. These three input lines can be configured under software control as digital inputs or analog inputs. These three input lines can also be used as the interrupt sources IRQ0IRQ3 and as the timer input signal (TIN) (Figure 9).
MCU
Port 3
R247 = P3M D1 1 = Analog 0 = Digital
DIG. PAD P31 (AN1)
+ -
P31 Data Latch IRQ, Tin
AN.
PAD P32 (AN2)
IRQ3 P32 Data Latch IRQ0
+ P33 (REF) PAD Vcc IRQ 0,1,2 = Falling Edge Detection IRQ 3 = Rising Edge Detection P33 Data Latch IRQ1
Figure 8. Port 3 Configuration
Comparator Inputs. Two analog comparators are added to Port 3 inputs for interface flexibility. Typical applications for these on-board comparators are: Zero crossing detection, A/D conversion, voltage scaling, and threshold detection. The dual comparator (common inverting terminal) features a single power supply which discontinues power in STOP mode. The common voltage range is 0-4V when the VCC is 5.0V. 20
Interrupts are generated on either edge of Comparator 2's output, or on the falling edge of Comparator 1's output. The comparator output may be used for interrupt generation, Port 3 data inputs, or TIN through P31. Alternately, the comparators may be disabled, freeing the reference input (P33) for use as IRQ1 and/or P33 input.
PRELIMINARY
DS97DZ80502
Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
FUNCTIONAL DESCRIPTION
RESET. Upon power-up the Power-On Reset circuit waits for TPOR ms, plus 18 clock cycles, and then starts program execution at address%000C (Hex) (Figure 10). The device control registers' reset value is shown in Table 2.
1
INT OSC POR (Cold Start)
XTAL OSC
Delay Line TPOR ms
P27 (Stop Mode)
18 CLK Reset Filter
Chip Reset
Figure 9. Internal Reset Configuration
Table 1. Z86C04/C08 & C05/C07 Control Registers Reset Condition Addr. 03H (3)* 02H (2)* 00H (0)* FFH(255) FFH (254) FDH (253) FCH (252) FBH (251) FAH (250) Reg. Port 3 Port 2 Port 0 SPL GPR RP FLAGS IMR IRQ D7 U U U 0 0 0 U 0 U D6 U U U 0 0 0 U U U D5 U U U 0 0 0 U U 0 D4 U U U 0 0 0 U U 0 D3 U U U 0 0 0 U U 0 D2 U U U 0 0 0 U U 0 D1 U U U 0 0 0 U U 0 D0 U U U 0 0 0 U U 0 Comments
IRQ3 is used for positive edge detection
F9H (249) F8H (248)* F7H (247)* F6H (246)* F5H (245) F4H (244) F3H (243) F2H (242) F1H (241)
IPR P01M P3M P2M PRE0 T0 PRE1 T1 TMR
U U U 1 U U U U 0
U U U 1 U U U U 0
U U U 1 U U U U 0
U 0 U 1 U U U U 0
U U U 1 U U U U 0
U U U 1 U U U U 0
U 0 0 1 U U 0 U 0
U 1 0 1 0 U 0 U 0
Inputs after reset
Note: *Registers are not reset after a STOP-Mode Recovery using P27 pin. A subsequent reset will cause these control registers to be re-configured as shown in Table 2 and the user must avoid bus contention on the port pins or it may affect device reliability.
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
FUNCTIONAL DESCRIPTION (Continued)
Program Memory. The Z86C04/C08 can address up to 1K/2K bytes of internal program memory (Figure 11). The first 12 bytes of program memory are reserved for the interrupt vectors. These locations contain six 16-bit vectors that correspond to the six available interrupts. Bytes 01023/2047 are on-chip mask-programmed ROM. register group. Upon power-up, the general purpose registers are undefined.
Location 255 254 Stack Pointer (Bits 7-0) Reserved Register Pointer Program Control Flags Interrupt Mask Register Interrupt Request Register Interrupt Priority Register Ports 0-1 Mode Port 3 Mode Port 2 Mode T Prescaler o Timer/Counter0 T1 Prescaler Timer/Counter1 Timer Mode Not Implemented
Indentifiers SPL
1023/2047 Location of First Byte of Instruction Executed After RESET On-Chip ROM 12 11 10 9 8 Interrupt Vector (Lower Byte) 7 6 5 Interrupt Vector (Upper Byte) 4 3 2 1 0 IRQ5 IRQ5 IRQ4 IRQ4 IRQ3 IRQ3 IRQ2 IRQ2 IRQ1 IRQ1 IRQ0 IRQ0
3FH/7FFH
253 252 251
RP Flags IMR IRQ IPR P01M P3M P2M PRE0 T0 PRE1 T1 TMR
0CH 0BH 0AH 09H 08H 07H 06H
250 249 248 247 246 245 244 243
05H
242
04H 03H 02H 01H 00H
241 240 128 127
General Purpose Registers 4 3 Port 3 Port 2 Reserved Port 0 P3 P2 P1 P0
Figure 10. Program Memory Map Register File. The Register File consists of three I/O port registers, 125 general-purpose registers, and 14 control and status registers (R0, R2-R3, R4-R127, and R241R255, respectively; see Figure 12). Note that R254 is available for general purpose use. The Z8 instructions can access registers directly or indirectly through an 8-bit address field. This allows short 4-bit register addressing using the Register Pointer. In the 4-bit mode, the register file is divided into eight working register groups, each occupying 16 continuous locations. The Register Pointer (Figure 13) addresses the starting location of the active working-
2 1 0
Figure 11. Register File
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DS97DZ80502
Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers Counter/Timer. There are two 8-bit programmable counter/timers (T0 and T1), each driven by its own 6-bit programmable prescaler. The T1 prescaler can be driven by internal or external clock sources, however the T0 can be driven by the internal clock source only (Figure 14). The 6-bit prescalers can divide the input frequency of the clock source by any integer number from 1 to 64. Each prescaler drives its counter, which decrements the value (1 to 256) that has been loaded into the counter. When both counter and prescaler reach the end of count, a timer interrupt request, IRQ4 (T0) or IRQ5 (T1), is generated. The counter can be programmed to start, stop, restart to continue, or restart from the initial value. The counters can also be programmed to stop upon reaching zero (single pass mode) or to automatically reload the initial value and continue counting (modulo-n continuous mode). The counters, but not the prescalers are read at any time without disturbing their value or count mode. The clock source for T1 is user-definable and can be either the internal microprocessor clock divided by four, or an external signal input through Port 3. The Timer Mode register configures the external timer input (P31) as an external clock, a trigger input that is retriggerable or non-retriggerable, or as a gate input for the internal clock.
r7 r6
r5 r4
r3 r2
r1 r0
R253 (Register Pointer)
1
The upper nibble of the register file address provided by the register pointer specifies the active working-register group.
FF
Register Group F
F0
R15 to R0
7F 70 6F 60 5F 50 4F 40 3F 30 2F 20 1F 10 0F
Specified Working Register Group
The lower nibble of the register file address provided by the instruction points to the specified register.
Register Group 1 Register Group 0
R15 to R0 R15 to R4* R3 to R0
00
I/O Ports
*Expanded Register Group (0) is selected in this figure by handling bits D3 to D0 as "0" in Register R253(RP).
Figure 12. Register Pointer Stack Pointer. The Z8 has an 8-bit Stack Pointer (R255) used for the internal stack that resides within the 124 general-purpose registers. General-Purpose Register (GPR). The general-purpose register upon device power-up is undefined. The generalpurpose register upon a STOP-Mode Recovery and reset stays in its last state. It may not keep its last state from a VLV reset if the VCC drops below 2.6V. Note: Register R254 has been designated as a general-purpose register and is set to 00H after any reset.
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PRELIMINARY
23
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
Internal Data Bus Write OSC PRE0 Initial Value Register Write T0 Initial Value Register Read T0 Current Value Register
/2
*
/4 Internal Clock 6-Bit Down Counter 8-Bit Down Counter
IRQ4
Clock Logic /4 6-Bit Down Counter 8-Bit Down Counter IRQ5
Internal Clock Gated Clock Triggered Clock External Trigger TIN P31 Write
PRE1 Initial Value Register Write
T1 Initial Value Register Read
T1 Current Value Register
* Note: Divide-by-two is not used in Low EMI Mode.
Internal Data Bus
Figure 13. Counter/Timers Block Diagram
Interrupts. The Z8 has six interrupts from six different sources. These interrupts are maskable and prioritized (Figure 15). The six sources are divided as follows: the falling edge of P31 (AN1), P32 (AN2), P33 (REF), the rising edge of P32 (AN2), and the two counter/timers. The Interrupt Mask Register globally or individually enables or disables the six interrupt requests (Table 3). When more than one interrupt is pending, priorities are resolved by a programmable priority encoder that is controlled by the Interrupt Priority register. All Z8 interrupts are vectored through locations in program memory. When an Interrupt machine cycle is activated, an interrupt request is granted. This disables all subsequent interrupts, saves the Program Counter and Status Flags, and then branches to the program memory vector location reserved for that interrupt. This memory location and the next byte contain the 16-bit starting address of the interrupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked and the interrupt request register is polled to determine which of the interrupt requests needs service. Note: User must select any Z86C08 mode in Zilog's C12 ICEBOXTM emulator. The rising edge interrupt is not supported on the Z86CCP00ZEM emulator.
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DS97DZ80502
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
FUNCTIONAL DESCRIPTION (Continued)
Table 2. Interrupt Types, Sources, and Vectors Name IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 Source AN2(P32) REF(P33) AN1(P31) AN2(P32) T0 T1 Vector Location 0,1 2,3 4,5 6,7 8,9 10,11 Comments External (F) Edge External (F) Edge External (F) Edge External (R) Edge Internal Internal
Notes: F = Falling edge triggered R = Rising edge triggered.
IRQ0 - IRQ5
IRQ
IMR 6
Global Interrupt Enable Interrupt Request
IPR
PRIORITY LOGIC
Vector Select
Figure 14. Interrupt Block Diagram
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DS97DZ80502
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers Clock. The on-chip oscillator has a high-gain, parallel-resonant amplifier for connection to a RC, crystal, ceramic resonator, LC, or any suitable external clock source (XTAL1 = Input, XTAL2 = Output). The crystal should be AT cut, 12 MHz max, with a series resistance (RS) less than or equal to 100 Ohms. The crystal should be connected across XTAL1 and XTAL2 using the vendor's crystal recommended capacitors (which depends on the crystal manufacturer, ceramic resonator and PCB layout) from each pin directly to device Ground pin 14 (Figure 16). Note that the crystal capacitor loads should be connected to VSS pin 14 to reduce ground noise injection. To use 32 KHz crystal, the 32 KHz operational mask option must be selected, and an external resistor R must be connected across XTAL1 and XTAL2.To use RC oscillator, the RC oscillator option must be selected. HALT Mode. This instruction turns off the internal CPU clock but not the crystal oscillation. The counter/timers and external interrupts IRQ0, IRQ1, IRQ2, and IRQ3 remain active. The device can be recovered by interrupts, either externally or internally generated. An interrupt request must be executed (enabled) to exit HALT mode. After the interrupt service routine, the program continues from the instruction after the HALT. STOP Mode. This instruction turns off the internal clock and external crystal oscillation and reduces the standby current. The STOP mode can be released by two methods. The first method is a RESET of the device by removing VCC or dropping the VCC below VLV. The second method is if P27 is at a low level when the device executes the STOP instruction. A low condition on P27 releases the STOP mode regardless if configured for input or output.
Zilog Program execution under both conditions begins at location 000C (Hex). However, when P27 is used to release the STOP mode, the I/O port mode registers are not reconfigured to their default power-on conditions. This prevents any I/O, configured as output when the STOP instruction was executed, from glitching to an unknown state. To use the P27 release approach with STOP mode, use the following instruction: LD NOP STOP P2M, #1XXX XXXXB
Note: (X = dependent upon user's application.)
In order to enter STOP or HALT mode, it is necessary to first flush the instruction pipeline to avoid suspending execution in mid-instruction. To do this, the user must execute a NOP (opcode = FFH) immediately before the appropriate sleep instruction, that is, as follows: FF 6F FF 7F NOP STOP or NOP HALT ; clear the pipeline ; enter HALT mode ; clear the pipeline ; enter STOP mode
Watch-Dog Timer (WDT). The Watch-Dog Timer is enabled by instruction WDT. When the WDT is enabled, it cannot be stopped by the instruction. With the WDT instruction, the WDT should be refreshed once the WDT is enabled within every Twdt period; otherwise, the Z8 resets itself. The WDT instruction affects the Flags accordingly: Z = 1, S = 0, V = 0. WDT = 5F (Hex)
XTAL1 C1
*
XTAL1 C1 C1
XTAL1
XTAL1 C XTAL1 R XTAL2
R XTAL2
32 KHz C2
*
*
XTAL2 C2
*
C2
L XTAL2 XTAL2
*
*
Ceramic Resonator or Crystal
*
LC Clock External Clock RC Clock
32 KHz Crystal Clock
* = Use pin 14.
Figure 15. Oscillator Configuration
26
PRELIMINARY
DS97DZ80502
Zilog Opcode WDT (5FH). The first time opcode 5FH is executed, the WDT is enabled, and subsequent execution clears the WDT counter. This has to be done within the maximum TWDT period; otherwise, the WDT times out and generates a Reset. The generated Reset is the same as a Power-On Reset of TPOR plus 18 XTAL clock cycles. The WDT does not work (run) in STOP mode. The WDT is disabled during and after a Reset, until the WDT is enabled again. Opcode WDH (4FH). When this instruction is executed it will enable the WDT during HALT. If not, the WDT will stop when entering HALT. This instruction does not clear the counters, it facilitates running the WDT function during HALT mode. A WDH instruction executed without executing WDT (5FH) has no effect. Permanent WDT Mask Option. Only when the Permanent WDT Mask Option is selected, then the WDT is hardwired to be enabled after reset. The WDT will operate in Run mode, HALT mode, and STOP mode. The Opcode 5FH is used to refresh or clear the WDT counter. The WDH instruction (4FH) has no effect The WDT will not run in Stop Mode if the system clock driving the WDT is selected (Z86C04 only). System Clock Driving WDT Mask Option (Z86C04 only) When this option is selected, the Z8's system clock drives the WDT instead of the on-board RC oscillator driving the
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers WDT. The WDT time-out will be SCLK x 32,512.The WDT will not run in Stop Mode. Low Voltage Protection (VLV). Maximum (VLV) Conditions: Case 1: Case 2: TA= -40C , +85C , Internal Clock Frequency equal or less than 6 MHz TA= -40C , +105C , Internal Clock Frequency equal or less than 4 MHz
1
Note: The internal clock frequency is one-half the external clock frequency in standard mode. The device will function normally at or above 3.0V under all conditions. Below 3.0V, the device functions normally until the Low Voltage Protection trip point (VLV) is reached. The device is guaranteed to function normally at supply voltages above the low voltage trip point for the temperatures and operating frequencies in Cases 1 and 2. The actual low voltage trip point is a function of temperature and process parameters (Figure 17). 2 MHz (Typical) Temp VLV -40C 3.0 0C 2.75 +25C 2.6 +70C +105C 2.3 2.1
ROM Protect. ROM Protect fully protects the Z86C04/C08 ROM code from being read internally. When ROM Protect is selected. ROM look-up tables can be used in this mode.
VCC (Volts)
3.2
3.0
2.8
2.6
VLV (Typical)
2.4
2.2
2.0 -60 -40 -20 0 20 40 60 80 100 120 140 Temperature (C)
Figure 16. Typical Z86C04/C08 VLV vs. Temperature
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PRELIMINARY
27
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
Z8(R) CONTROL REGISTER DIAGRAMS
R241 TMR D7 D6 D5 D4 D3 D2 D1 D0
R244 T0 D7 D6 D5 D4 D3 D2 D1 D0
0 No Function 1 Load T 0 0 Disable T 0 Count 1 Enable T 0 Count 0 No Function 1 Load T 1 0 Disable T 1 Count 1 Enable T 1 Count T IN Modes 00 External Clock Input 01 Gate Input 10 Trigger Input (Non-retriggerable) 11 Trigger Input (Retriggerable) Reserved (Must be 0.)
T0 Initial Value (When Written) (Range: 1-256 Decimal 01-00 HEX) T0 Current Value (When READ)
Figure 20. Counter/Timer 0 Register (F4H: Read/Write)
R245 PRE0 D7 D6 D5 D4 D3 D2 D1 D0 Count Mode 0 T0 Single Pass 1 T Modulo-n
0
Reserved (Must be 0.) Prescaler Modulo (Range: 1-64 Decimal 01-00 Hex)
Figure 17. Timer Mode Register (F1H: Read/Write)
R242 T1 D7 D6 D5 D4 D3 D2 D1 D0
Figure 21. Prescaler 0 Register (F5H: Write Only)
R246 P2M
T1 Initial Value (When Written) (Range 1-256 Decimal 01-00 HEX) T1 Current Value (When READ)
D7
D6 D5
D4 D3
D2
D1 D0
P2 7 - P20 I/O Definition 0 Defines Bit as OUTPUT 1 Defines Bit as INPUT
Figure 18. Counter Time 1 Register (F2H: Read/Write)
Figure 22. Port 2 Mode Register (F6H: Write Only)
R243 PRE1 D7 D6 D5 D4 D3 D2 D1 D0
R247 P3M D7 D6 D5 D4 D3 D2 D1 D0
Count Mode 0 T 1 Single Pass 1 T 1 Modulo Clock Source 1 T 1Internal 0 T 1External Timing Input (T IN) Mode Prescaler Modulo (Range: 1-64 Decimal 01-00 HEX)
0 Port 2 Open-Drain 1 Port 2 Push-Pull Active Port 3 Inputs 0 Digital 1 Analog Reserved (Must be 0.)
Figure 19. Prescaler 1 Register (F3H: Write Only)
Figure 23. Port 3 Mode Register (F7H: Write Only)
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Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
R248 P01M D7 D6 D5 D4 D3 D2 D1 D0
R251 IMR D7 D6 D5 D4 D3 D2 D1 D0
1
1 Enables IRQ5-IRQ0 (D = IRQ0) 0 Reserved (Must be 0.) 1 Enables Interrupts
P00 - P0 3 Mode 00 = Output 01 = Input Must be 1. Reserved (Must be 0.)
Figure 24. Port 0 and 1 Mode Register (F8H: Write Only)
Figure 27. Interrupt Mask Register (FBH: Read/Write)
R252 Flags
R249 IPR D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
User Flag F1
Interrupt Group Priority 000 Reserved 001 C > A > B 010 A > B > C 011 A > C > B 100 B > C > A 101 C > B > A 110 B > A > C 111 Reserved IRQ1, IRQ4 Priority (Group C) 0 IRQ1 > IRQ4 1 IRQ4 > IRQ1 IRQ0, IRQ2 Priority (Group B) 0 IRQ2 > IRQ0 1 IRQ0 > IRQ2 IRQ3, IRQ5 Priority (Group A) 0 IRQ5 > IRQ3 1 IRQ3 > IRQ5 Reserved (Must be 0.)
User Flag F2 Half Carry Flag Decimal Adjust Flag Overflow Flag Sign Flag Zero Flag Carry Flag
Figure 28. Flag Register (FCH: Read/Write)
R253 RP D7 D6 D5 D4 D3 D2 D1 D0
Figure 25. Interrupt Priority Register (F9H: Write Only)
Reserved (Must be 0.) Register Pointer
R250 IRQ D7 D6 D5 D4 D3 D2 D1 D0 IRQ0 = P32 Input IRQ1 = P33 Input IRQ2 = P31 Input IRQ3 = P32 Input IRQ4 = T0 IRQ5 = T1 Reserved (Must be 0.)
Figure 29. Register Pointer (FDH: Read/Write)
R255 SPL D7 D6 D5 D4 D3 D2 D1 D0
Stack Pointer Lower Byte (SP 0 - SP 7 )
Figure 26. Interrupt Request Register (FAH: Read/Write)
Figure 30. Stack Pointer (FFH: Read/Write)
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PRELIMINARY
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
DEVICE CHARACTERISTICS Standard Mode
Vcc (Volt)
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 5.5V 2.0 1.5 1.0 .5 -60 V OL V IL -40 -20 0 20 40 60 80 100 3.0V 5.5V Temp 120 (C ) 3.0V
Figure 31. VIL, VOL vs. Temperature
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PRELIMINARY
DS97DZ80502
Zilog
Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Standard Mode
Vcc (Volt)
1
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -60 -40 -20 0 20 40 60 80 100 120 3.0V Temp C 5.5V 3.0V 5.5V
VOH Vs Temp V IH Vs Temp
Figure 32. VIH, VOH vs. Temperature
I OH (mA) 2.0 3.0 4.0 5.0 6.0
V OH (Volt)
0 -2.0 -3.0 -4.0 -5.0 -6.0
-7.0 125 -8.0
25
-40 C
125
25
-40 C
3.0V 5.5V
Figure 33. Typical IOH vs. VOH
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PRELIMINARY
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
Time (ms) 40
30
20
C +105 +25 C
10
-40 C
0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Voltage
Figure 34. Typical WDT Time Out Period vs. VCC Over Temperature
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
PACKAGE INFORMATION
1
Figure 35. 18-Pin DIP Package Diagram
Figure 36. 18-Pin SOIC Package Diagram
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PRELIMINARY
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Z86C04/C08 CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
Zilog
ORDERING INFORMATION
Z86C04 (12 MHz) Standard Temperature 18-Pin DIP Z86C0412PSC Extended Temperature 18-Pin DIP Z86C0412PEC Z86C0412PAC 18-Pin SOIC Z86C0412SSC 18-Pin SOIC Z86C0412SEC Z86C0412SAC Z86C08 (12 MHz) Standard Temperature 18-Pin DIP Z86C0812PSC Extended Temperature 18-Pin DIP Z86C0812PEC Z86C0812PAC 18-Pin SOIC Z86C0812SSC 18-Pin SOIC Z86C0812SEC Z86C0812SAC
For fast results, contact your local Zilog sale offices for assistance in ordering the part(s) desired.
CODES Preferred Package
P = DIP S = SOIC
Longer Lead Time
E = -40C to +105C A = -40C to +125C
Preferred Temperature
S = 0C to +70C
Speeds 12 = 12 MHz Environmental
C = Plastic Standard
Example:
Z 86C04 12 P S C is a Z86C04, 12 MHz, DIP, 0C to +70C, Plastic Standard Flow Environmental Flow T emperature Package Speed Product Number Zilog Prefix
34
PRELIMINARY
DS97DZ80502

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