View ZN428E8_25110.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS
AUGUST 1994
DS3007-2.1
ZN428E8/ZN428J8/ZN428D
8-BIT LATCHED INPUT D-A CONVERTER
The ZN428 is a monolithic 8-bit D-A converter with input latches to facilitate updating from a data bus. The latch is transparent when enable is LOW and the data is held when enable is taken HIGH. The ZN428 also contains a 2.5V reference the use of which is pin optional to retain flexibility. An external fixed or varying reference may therefore be substituted.
BIT 7 BIT 8 NC ENABLE ANALOG OUTPUT V REF IN V REF OUT ANALOG GROUND 1 2 3 4 5 6 7 8 16 15 14 ZN428J8 13 ZN428E8 12 11 10 9 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 (MSB) +V CC (+5V) DIGITAL GROUND
FEATURES s Contains DAC with Data Latch and On-Chip Reference s Guaranteed Monotonic over the Full Operating Temperature Range s Single +5V Supply s Microprocessor Compatible s TTL and 5V CMOS Compatible s 800ns Settling Time s Complementary to ZN427 A to D Series s Commercial or Military Temperature Range ORDERING INFORMATION
Device Type ZN428D ZN428E8 ZN428J8 Operating temperature 0C to +70C 0C to +70C -55C to +125C Package MP16W DP16 DC16
DC16 DP16
BIT 7 BIT 8 NC ENABLE ANALOG OUTPUT V REF IN V REF OUT ANALOG GROUND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 (MSB) +V CC (+5V) DIGITAL GROUND
ZN428D
MP16 WIDE BODY
Fig.1 Pin connections (not to scale) - top view
ZN428
ABSOLUTE MAXIMUM RATINGS
Supply voltage VCC Max.voltage, logic and VREF inputs Operating temperature range Storage temperature range Analog ground to digital ground +7.0V +VCC 0C to +70C (ZN428E8, ZN428D) -55C to +125C (ZN428J8) -55C to +125C 200mV
ELECTRICAL CHARACTERISTICS
(VCC = +5V, Tamb = 25C unless otherwise specified) Parameter Min. Typ. Max. Units Conditions
Internal Voltage Reference Output voltage Slope resistance VREF OUT T.C. Reference current D-A Converter Linearity error Differential non-linearity Linearity error T.C. Differential non-linearity T.C. Offset voltage Offset voltage T.C. Full-scale output Full-scale output T.C. Analog output resistance External reference voltage Settling time to 0.5 LSB
2.475 4 2.545 0 -
2.550 0.5 50 0.5 3 6 2 6 2.550 2 4 800 1.25
2.625 2 15 0.5 5 2.555 3.0 -
V ppm/C mA LSB LSB ppm/C ppm/C mV V/C
123 123
RREF = 390 CREF = 1F
Note 1 2.0V VREF IN 3.0V
All bits off
ppm/C k V ns s
External reference VREF IN = 2.560V, all bits ON
1 LSB major transition (Note 2) All bits ON to OFF or OFF to ON (Note 2)
Operating temperature range: ZN428D and ZN428 E8 ZN428J8 Supply voltage (VCC) Supply current Power consumption Note 1: See REFERENCE Note 2: RL = 10M, CL = 10pF Note 3: All inputs HIGH (VIH = 3.5V)
0 -55 4.5 -
5.0 20 100
70 125 5.5 30 -
C C V mA mW Note 3
ZN428
ELECTRICAL CHARACTERISTICS (cont.)
Parameter Logic (over specified operating temperature range) High level input voltage Low level input voltage High level input current Low level input current Input clamp diode voltage Enable pulse width Data set-up time Data hold time Note 4: Set up time before ENABLE goes high Note 5: Hold time after ENABLE goes high 2.0 100 150 10 -1.5 0.8 60 20 -5 V V A A A V ns ns ns Note 4 Note 5 VIN = 5.5V, VCC = Max. VIN = 2.4V, VCC = Max. VIN = 0.4V, VCC = Max. IIN = -8mA Min. Typ. Max. Units Conditions
D-A CONVERTER
The converter is of the voltage switching type and uses an R-2R ladder network as shown in Fig.3. Each 2R element is connected to 0V or VREF IN by transistor voltage switches specially designed for low offset voltage (<1mV). A binary weighted voltage is produced at the output of the R-2R ladder.
Fig.3 The R-2R ladder network
Analog output = n (VREF IN - VOS) + VOS 256 where n is the digital input to the D-A from the data latch. VOS is a small offset voltage produced by the D-A switch currents flowing through the package lead resistance. The value of VOS is typically 1mV. This offset will normally be removed by the setting up procedure (see Operating Notes) and because the offset temperature coefficient is low (6V/C)the effect on accuracy is negligible.
ZN428
Fig.4 Analog output equivalent circuit
Fig.4 shows equivalent circuit of the output (ignoring VOS). The output resistance R has a temperature coefficient of +0.2% per C. The gain drift due to this is 0.2R % per C. R+RL RL should be chosen as large as possible to make the gain drift small. As an example if RL = 400k then the gain drift due to the T.C. of R for a 100C change in ambient temperature will be less than 0.2%. Alternatively the ZN428 can be buffered by an amplifier (see Operating Notes).
REFERENCE
(a) Internal Reference The internal reference is an active bandgap circuit which is equivalent to a 2.5V Zener diode with very low slope impedance (Fig.5). A resistor (RREF), should be connected between +VCC (pin 10) and pin 7. The recommended value of 390 will supply a nominal reference current of (5.02.5)/0.39 = 6.4mA. A stabilising/decoupling capacitor CREF = 1F is required between pins 7 and 8 for internal reference option, VREF OUT (pin 7) being connected to VREF IN (pin 6).
Fig.5 Internal voltage reference
ZN428
Up to five ZN428s may be driven from one internal reference (there is no need to reduce RREF). This useful feature saves power and gives excellent gain tracking between the converters. (b) External Reference If required an external reference voltage may be connected to VREF IN. The slope resistance of such a reference should be less than 2.5 , where n is the number of converters supplied. n VREF IN can be varied from 0 to +3V for ratiometric operation. The ZN428 is guaranteed monotonic for VREF IN above 2V.
LOGIC
Input coding is binary for unipolar operation and offset binary for bipolar operation. When the ENABLE input is low the data inputs drive the D to A directly. When ENABLE goes high the input data word is held in the data latch. The equivalent circuit for the data and clock inputs is shown in Fig.6. The ZN428 is provided with separate analog and digital ground connections. The circuit will operate correctly with as much as 200mV between the two grounds.
Fig.6 Equivalent circuit of all inputs
OPERATING NOTES
(1) Unipolar D-A Converter The nominal output range of the ZN428 is 0 to VREF IN through a 4 resistance. Other output ranges can readily be obtained by using an external amplifier. The general scheme (Fig.7) is suitable for amplifiers with input bias currents less than 1.5A. The resulting full-scale range is given by: VOUT FS =( 1 + R1 ) VREF IN = G.VREF IN R2 The impedance at the inverting input is R1//R2 and for low drift with temperature this parallel combination should be equal to the ladder resistance (4k). The required nominal values of R1 and R2 are given by R1 = 4Gk and R2 = 4G/(G-1)k.
Using these relationships a table of nominal resistance values for R1 and R2 can be constructed for VREF IN = 2.5V. Output Range +5V +10V G 2 4 R1 8k 16k R2 8k 5.33k
For gain setting R1 is adjusted about its nominal value. Practical circuit realisations (including amplifier stabilising components) for +5 and +10V output ranges are given in Fig.8. Settling time for a major transition is 1.5s typical.
ZN428
Fig.7 Unipolar operation - basic circuit
Fig.8 Unipolar operation - component values
ZN428
UNIPOLAR ADJUSTMENT PROCEDURE
(i) Set all bits to OFF (low) with ENABLE low and adjust zero until VOUT = 0.0000V. (ii) Set all bits ON (high) and adjust gain until VOUT = FS - 1LSB.
UNIPOLAR LOGIC CODING
Input Code (Binary) 11111111 11111110 11000000 10000001 10000000 01111111 01000000 00000001 00000000 Analog Output (Nominal Value) FS - 1LSB FS - 2 LSB 3/ FS 4 1/ FS + 1LSB 2 1/ FS 2 1/ FS - 1LSB 2 1/ FS 4 1LSB 0
UNIPOLAR SETTING UP POINTS
Output Range, +FS +5V +10V
1LSB = FS 256
LSB 19.5 mV 39.1mV
FS - 1LSB 4.9805V 9.9609V
Fig.9 Bipolar operation - basic circuit
(2) Bipolar D-A Converter For bipolar operation the output from the ZN428 is offset by half full-scale by connecting a resistor R3 between VREF IN and the inverting input of the buffer amplifier (Fig.9). When the digital input to the ZN428 is zero the analog output is zero and the amplifier output should be -Full-scale. An input of all ones to the D-A will give a ZN428 output of VREF IN and the amplifier output required is +Full-scale. Also, to match the ladder resistance the parallel combination of R1, R2 and R3 should be 4k. The nominal values of R1, R2 and R3 which meet these conditions are given by R1 = 8Gk, R2 = 8G/(G-1)k and R3 = 8k. where the resultant output range is G VREF IN. A bipolar output range of VREF IN (which corresponds to the basic unipolar range 0 to VREF IN) is obtained if R1 = R3 = 8k and R2 = . Assuming that VREF IN = 2.5V the nominal values of resistors for 5 and 10V output ranges are given in the following table:
Output Range +5V +10V
G 2 4
R1 16k 32k
R2 16k 10.66k
R3 8k 8k
Minus full scale (0ffset) is set by adjusting R1 about its nominal value relative to R3. Plus full-scale (gain) is set by adjusting R2 relative to R1. Practical circuit realisations are given in Fig.10. Note that in the 5V case R3 has been chosen as 7.5k (instead of 8.2k) to get a more symmetrical range of adjustment using standard potentiometers. Settling time for a major transition is 1.5s typical.
ZN428
Fig.10 Bipolar operation - component values
BIPOLAR ADJUSTMENT PROCEDURE
(i) Set all bits to OFF (low) with ENABLE low and adjust offset until the amplifier output reads -full-scale. (ii) Set all bits ON (high) and adjust gain until the amplifier output reads +(full-scale - 1LSB).
BIPOLAR LOGIC CODING
Input Code (Offset Binary) 11111111 11111110 11000000 10000001 10000000 01111111 01000000 00000001 00000000 Analog Output (Nominal Value) +(FS - 1LSB) +(FS - 2 LSB) +1/2 FS + 1LSB 0 -1 LSB -1/2 FS -(FS - 1LSB) -FS
BIPOLAR SETTING UP POINTS
Input Range, FS 5V 10V
1LSB = 2FS 256
LSB
-FS
+(FS 1LSB) +4.9609V 9.9219V
39.1 mV 78.1mV
-5.0000V -10.0000V
HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire, United Kingdom. SN2 2QW Tel: (0793) 518000 Fax: (0793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017, 1500 Green Hills Road, Scotts Valley, California 95067-0017, United States of America. Tel (408) 438 2900 Fax: (408) 438 5576
CUSTOMER SERVICE CENTRES * FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax: (1) 64 46 06 07 * GERMANY Munich Tel: (089) 3609 06-0 Fax: (089) 3609 06-55 * ITALY Milan Tel: (02) 66040867 Fax: (02)66040993 * JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510 * NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023 * SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 * SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 * TAIWAN, ROC Taipei Tel: 886 2 5461260 Fax: 886 2 7190260 * UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (0793) 518510 Fax: (0793) 518582 These are supported by Agents and Distributors in major countries world-wide. (c) GEC Plessey Semiconductors 1994 Publication No. DS3007 Issue No. 2.1 August 1994 TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRINTED IN UNITED KINGDOM
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The

▲Up To Search▲

Price & Availability of ZN428E8

	To Download ZN428E8 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .