PART |
Description |
Maker |
PM5371 PM5371-RI |
VT/TU Cross-Connect Switch ATM SWITCHING CIRCUIT, PQFP160 SONET/SDH TRIBUTARY UNIT CROSS CONNECT
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PMC-Sierra, Inc. PMC[PMC-Sierra, Inc]
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M5-128/120-5YI M5-128/120-5YC M5-128/160-5YI M5-19 |
Fifth Generation MACH Architecture 第五代马赫架 Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 7.5 ns, PQFP208 Fifth Generation MACH Architecture EE PLD, 5.5 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP208 Fifth Generation MACH Architecture EE PLD, 7.5 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 12 ns, PBGA256 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 15 ns, PBGA352
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Lattice Semiconductor Corporation Lattice Semiconductor, Corp. Air Cost Control
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M5LV-320_192-10AI M5LV-512_104-6AC M5-192_74-15YC |
IND SHLD 3.3UH 9A RMS SMT Fifth Generation MACH Architecture EE PLD, 7.5 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 12 ns, PBGA256 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP208 Fifth Generation MACH Architecture EE PLD, 20 ns, PQFP240 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP144 Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP208 10-Bit Broadband Modem Mixed Signal Front End (MxFE®); Package: LFCSP (9x9mm, 7.10 exposed pad); No of Pins: 64; Temperature Range: Industrial EE PLD, 12 ns, PQFP144 12-Bit Broadband Modem Mixed Signal Front End (MxFE®); Package: LFCSP (9x9mm, 7.10 exposed pad); No of Pins: 64; Temperature Range: Commercial EE PLD, 15 ns, PQFP144 12-Bit Broadband Modem Mixed Signal Front End (MxFE®); Package: LFCSP (9x9mm, 7.10 exposed pad); No of Pins: 64; Temperature Range: Industrial EE PLD, 15 ns, PQFP144 Fifth Generation MACH Architecture EE PLD, 6.5 ns, PQFP240 CONNECTOR ACCESSORY EE PLD, 10 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 7.5 ns, PBGA352 Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 20 ns, PBGA352 Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 10 ns, PBGA352 Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP160 Fifth Generation MACH Architecture EE PLD, 12 ns, PQFP240 Fifth Generation MACH Architecture EE PLD, 10 ns, PBGA256 Fifth Generation MACH Architecture EE PLD, 15 ns, PQFP240 Fifth Generation MACH Architecture EE PLD, 6.5 ns, PQFP208 Fifth Generation MACH Architecture EE PLD, 20 ns, PQFP208 Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP208 CONNECTOR ACCESSORY EE PLD, 12 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 5.5 ns, PQFP100 Fifth Generation MACH Architecture EE PLD, 10 ns, PQFP240 Fifth Generation MACH Architecture
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Lattice Semiconductor, Corp. Lattice Semiconductor Corporation
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CAT64LC20ZS CAT64LC20ZP CAT64LC20J-TE7 CAT64LC20J- |
36-Mbit QDR-II SRAM 4-Word Burst Architecture 36-Mbit QDR-II SRAM 2-Word Burst Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Flow-through SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 36-Mbit QDR™-II SRAM 2-Word Burst Architecture SPI串行EEPROM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM SPI串行EEPROM 256K (32K x 8) Static RAM SPI串行EEPROM
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Analog Devices, Inc. Electronic Theatre Controls, Inc.
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CAT64LC40ZJ CAT64LC40ZS CAT64LC40J-TE7 CAT64LC40J- |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit QDR-II SRAM 4-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture SPI串行EEPROM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
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Analog Devices, Inc.
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BBF2805SE BBF2815S BBF2812S BBF2805SK BBF2803SH BB |
3.3V, 20W DC-DC converter 15V, 20W DC-DC converter 12V, 20W DC-DC converter Analog IC 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 18-Mbit QDR-II SRAM 2-Word Burst Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture 20W DC-DC Converter(输出功率20WDC-DC转换
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M.S. Kennedy Corp. M.S. Kennedy Corporation
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MEC1-105-02-S-D MEC1-120-02-S-D-A |
1MM MINI-EDGE CARD ASSEMBLY 10 CONTACT(S), FEMALE, STRAIGHT SINGLE PART CARD EDGE CONN, SURFACE MOUNT, SOCKET CONN EDGE CARD DL 1MM 40POS SMD
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Samtec, Inc. SAMTEC INC
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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CY7C1371D-100AXI CY7C1371D-100BGI CY7C1373D-100BZI |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PQFP100 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 18兆位(为512k × 36/1M × 18)流体系结构,通过与NoBLTM的SRAM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PBGA165 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA119 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA165 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PQFP100 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA165 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA119
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Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CY7C1472BV25-167BZXC CY7C1472BV25-167BZXI CY7C1472 |
2M X 36 ZBT SRAM, 3 ns, PBGA165 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?/a> Architecture
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CYPRESS SEMICONDUCTOR CORP
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50-10A-20 50-12B-10 |
Card Edge Connector; Contact Termination:Solder; Leaded Process Compatible:Yes RoHS Compliant: Yes SINGLE PART CARD EDGE CONN
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Cinch Connectors
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