PART |
Description |
Maker |
CD4013BMS CD4013BE CD4013 FN3080 |
D-Type Flip Flop, Dual, Rad-Hard, CMOS, Logic From old datasheet system CMOS Dual ‘D’-Type Flip-Flop CMOS Dual ??Type Flip-Flop IC-4000CMOS
CMOS Dual D-Type Flip-Flop CMOS Dual ‘D?Type Flip-Flop
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INTERSIL[Intersil Corporation]
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HCTS112MS HCTS112D HCTS112DMSR HCTS112HMSR HCTS112 |
Radiation Hardened Dual JK Flip-Flop HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
|
Intersil, Corp. INTERSIL[Intersil Corporation]
|
74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
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PHILIPS[Philips Semiconductors] NXP Semiconductors N.V.
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74FR1074 74FR1074SCX |
FR/FASTR SERIES, DUAL NEGATIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 0.150 INCH, MS-012, SOIC-14 From old datasheet system Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
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MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation Intersil, Corp.
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74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
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NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear Dual J-K Negative-edge-triggered Flip-Flops(with Clear) FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
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HITACHI[Hitachi Semiconductor]
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74LCX112SJ 74LCX112 74LCX112M 74LCX112MTC 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
|
Fairchild Semiconductor, Corp. http:// FAIRCHILD[Fairchild Semiconductor]
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MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator 5V ECL Low Impedance Driver Dual Type D Master-Slave Flip-Flop ECL/TTL Clock Driver 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 3.3V / 5V ECL ÷4 Divider Quad 2-Input NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset 3.3V / 5V Hex Differential Line Receiver / Driver 3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
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