| PART |
Description |
Maker |
| ISPLSI1032EA-170LT100 ISPLSI1032EA-200LT100 1032EA |
60 MHz in-system prommable high density PLD
170 MHz in-system prommable high density PLD
125 MHz in-system prommable high density PLD
100 MHz in-system prommable high density PLD
Shielded Paired Cable; Number of Conductors:8; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyethylene; Shielding Material:Aluminum Foil/Polyester Tape/Tinned Copper Braid; Number of Pairs:4 RoHS Compliant: Yes
In-System Programmable High Density PLD 在系统可编程高密度可编程逻辑器件
|
LATTICE[Lattice Semiconductor]
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| ISPLSI2096VE-100LT128 ISPLSI2096VE-135LT128 ISPLSI |
3.3V In-System Programmable SuperFAST?/a> High Density PLD
CRYSTAL 24.0 MHZ 20PF SMD
3.3V In-System Programmable SuperFASTHigh Density PLD
3.3V In-System Programmable SuperFAST High Density PLD
3.3V In-System Programmable SuperFAST⑩ High Density PLD
3.3VIn-SystemProgrammableSuperFASTHighDensityPLD
|
Lattice Semiconductor Corporation
LATTICE[Lattice Semiconductor]
|
| ISPLSI2032VE ISPLSI2032VE-110LB49 ISPLSI2032VE-110 |
225 MHz 3.3V in-system prommable superFAST high density PLD
3.3V In-System Programmable High Density SuperFAST?/a> PLD
3.3V In-System Programmable High Density SuperFAST?/a> PLD
3.3V In-System Programmable High Density SuperFAST⑩ PLD
3.3V In-System Programmable High Density SuperFAST PLD
IC,Normally-Open Panel-Mount Solid-State Relay,1-CHANNEL,M:HL048HD4.4
IC,Normally-Open Panel-Mount Solid-State Relay,1-CHANNEL,M:HL048HD4.3
IC,Normally-Closed Panel-Mount Solid-State Relay,1-CHANNEL,M:HL048HD4.4 EE PLD, 13 ns, PQCC44
3.3V In-System Programmable High Density SuperFASTPLD EE PLD, 13 ns, PQFP44
3.3V In-System Programmable High Density SuperFASTPLD EE PLD, 6 ns, PQCC44
3.3V In-System Programmable High Density SuperFASTPLD 3.3在系统可编程高密度PLD的超快⑩
3.3VIn-SystemProgrammableHighDensitySuperFASTPLD
|
LATTICE[Lattice Semiconductor]
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| ISPLSI1024 ISPLSI1024EA-200LT100 1024EA ISPLSI1024 |
200 MHz in-system prommable high density PLD
Shielded Paired Cable; Number of Conductors:8; Conductor Size AWG:28; No. Strands x Strand Size:7 x 36; Jacket Material:Polyethylene; Number of Pairs:4; Features:Alumunium Foil Polyester/Tinned Copper Braid; Impedance:120ohm RoHS Compliant: Yes
In-System Programmable High Density PLD
100 MHz in-system prommable high density PLD
|
Lattice Semiconductor Corporation
LATTICE[Lattice Semiconductor]
http://
|
| ISPLSI2096E-100LQ128 ISPLSI2096E-100LT128 ISPLSI20 |
In-SystemProgrammableSuperFASTHighDensityPLD
In-System Programmable SuperFAST?/a> High Density PLD
In-System Programmable SuperFAST High Density PLD
In-System Programmable SuperFAST⑩ High Density PLD
In-System Programmable SuperFASTHigh Density PLD EE PLD, 10 ns, PQFP128
In-System Programmable SuperFAST??High Density PLD
|
LATTICE[Lattice Semiconductor]
Lattice Semiconductor, Corp.
LATTICE SEMICONDUCTOR CORP
|
| ISPLSI2128E-100LT176 ISPLSI2128E-135LT176 ISPLSI21 |
In-SystemProgrammableSuperFASTHighDensityPLD
In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP176
In-System Programmable SuperFAST High Density PLD
In-System Programmable SuperFAST⑩ High Density PLD
In-System Programmable SuperFAST?/a> High Density PLD
|
Lattice Semiconductor, Corp.
Lattice Semiconductor Corporation
LATTICE[Lattice Semiconductor]
|
| ISP844X ISP824 ISP814 ISP824X ISP814X IS814 IS824 |
6V, 50mA hihg density AC input phototransistor optically coupled isolator
HIGH DENSITY A.C. INPUT PHOTOTRANSISTOR OPTICALLY COUPLED ISOLATORS 高密度交流输入光电晶体管的光耦合隔离
RES 18K 1/10W 5% 0805 TF
|
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
ISOCOM
|
| LTV8192M LTV-819-1S-TA LTV829S-V LTV-829S-TA LTV82 |
High Density Mounting Type Photocoupler 1 CHANNEL TRANSISTOR OUTPUT OPTOCOUPLER
High Density Mounting Type Photocoupler 2 CHANNEL TRANSISTOR OUTPUT OPTOCOUPLER
High Density Mounting Type Photocoupler(762.22 k) 高密度安装类型光电耦合62.22十一
|
Lite-On Technology, Corp.
|
| QL4016-0PG208M QL4016-0PG208M_883 QL4016-0PL84M QL |
QuickRAM Combining Performance, Density and Embedded RAM(性能、密度和嵌入式相结合的QuickRAM系列)
90,000 Usable PLD Gate QuickRAM Combining Performance, Density and Embedded RAM
|
QuickLogic Corp.
List of Unclassifed Manufacturers
|
| LC4128X LC4256ZC-45M132C1 LC4256ZC-75M132C1 LC4032 |
3.3V/2.5V/1.8V在系统可编程超快高密PDLs
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 4.2 ns, PQFP100
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 7.5 ns, PBGA56
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 7.5 ns, PQFP48
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 3.7 ns, PQFP48
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 5 ns, PBGA56
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 5 ns, PQFP48
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs EE PLD, 7.5 ns, PQFP100
3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs
|
Lattice Semiconductor Corporation
http://
Lattice Semiconductor, Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
