| PART |
Description |
Maker |
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 54HHSC125FD 54HHSC165LD 54HSC74LC 54HST574LC 54QHS |
HSC SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, CDFP14
HSC SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CQCC20
HSC SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20
HST/T SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20
HSC SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, CDFP20
HST/T SERIES, 8-BIT ENCODER, CDIP16
HST/T SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, UUC
HSC SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, UUC
HST/T SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP24
HST/T SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP24
HST/T SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20
HST/T SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
HST/T SERIES, QUAD 2-INPUT AND GATE, UUC
HSC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20
HSC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20
|
|
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| 74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| HCTS4002MS FN3075 HCTS4002D HCTS4002DMSR HCTS4002H |
From old datasheet system
Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered
Radiation Hardened Dual 4-Input NOR Gate HCT SERIES, DUAL 4-INPUT NOR GATE, CDIP14
Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125 HCT SERIES, DUAL 4-INPUT NOR GATE, CDFP14
|
INTERSIL[Intersil Corporation]
Intersil, Corp.
|
| MC14518BCPG MC14518BDWG MC14518BFELG |
Dual Up Counters 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16
Dual Up Counters 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16
|
ON Semiconductor
|
| 10531M/B2AJC |
10K SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20
|
MOTOROLA INC
|
| 74AC161MTC 74AC161PC 74AC161SC 74AC161SJ 74AC161 7 |
Synchronous Presettable Binary Counter
Synchronous Up Counter AC SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
Complete, Dual, 12-Bit Multiplying DAC with 8-Bit Bus Interface ACT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
Synchronous Presettable Binary Counter ACT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16
From old datasheet system
Synchronous Presettable Binary Counter
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| HEF4013BDB |
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
NXP SEMICONDUCTORS
|
| MC14013BCLD |
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
MOTOROLA INC
|
| TC4013BP |
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
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