| PART |
Description |
Maker |
| AS7C1025B AS7C1025B-20TJIN AS7C1025B-10JC AS7C1025 |
128 x 64 pixel format, LED or EL Backlight available 128K X 8 STANDARD SRAM, 20 ns, PDSO32
High Speed CMOS Logic Triple 3-Input NAND Gates 14-SOIC -55 to 125 128K X 8 STANDARD SRAM, 12 ns, PDSO32
5V 128K X 8 CMOS SRAM (Center power and ground) 128K X 8 STANDARD SRAM, 20 ns, PDSO32
5V 128K X 8 CMOS SRAM (Center power and ground) 128K X 8 STANDARD SRAM, 15 ns, PDSO32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
SRAM - 5V Fast Asynchronous
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| SMBJ5.0A SMBJ51A SMBJ17A SMBJ100A SMBJ78CA SMBJ6.0 |
Silicon Avalanche Diodes - 600W Surface Mount Transient Voltage Suppressors
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets 16-CDIP -55 to 125
High Speed CMOS Logic Dual 4-Stage Static Shift Register 16-CDIP -55 to 125
CMOS Dual 4-Bit Latch 24-SO -55 to 125
High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
High Speed CMOS Logic Analog Multiplexers/Demultiplexers 16-CDIP -55 to 125
High Speed CMOS Logic 14-Stage Binary Counter with Oscillator 16-CDIP -55 to 125
CMOS Dual BCD Up-Counter 16-SOIC -55 to 125
High Speed CMOS Logic 10-to-4 Line Priority Encoder 16-CDIP -55 to 125
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125
Replaced by VSP2560 : 10-bit, 21 MSPS 1-Channel AFE for CCD Sensors 48-TQFP
Silicon Avalanche Diodes - 600W Surface Mount Transient Voltage Suppressors 硅雪崩二极管- 600W表面贴装瞬态电压抑制器
CMOS Dual Monostable Multivibrator 16-TSSOP -55 to 125 硅雪崩二极管- 600W表面贴装瞬态电压抑制器
|
http://
LITTELFUSE[Littelfuse]
Littelfuse, Inc.
|
| SN74LS114D SN54LS114J SN74LS114N SN54LS114A SN5474 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| 74HC107D-Q100 74HCT107D-Q100 74HC107PW-Q100 |
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
| M74LS73AP |
Dual J-K Negative Edge-Triggered Flip Flop with Reset
|
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
| 74HC73 74HC73D 74HC73N 74HC73DB 74HCT73 |
Dual JK flip-flop with reset; negative-edge trigger
|
http://
NXP Semiconductors
|
| 74F112 I74F112D I74F112N N74F112D N74F112N 74F112_ |
From old datasheet system
Dual J-K negative edge-triggered flip-flop
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| N74F114D N74F114N 74F114 |
Dual J-K negative edge-triggered flip-flop with common clock and reset
|
NXP Semiconductors
|
| MAX768 MAX768EEE MAX768C_D MAX768C/D |
Low-Noise, Dual-Output, Regulated Charge Pump for GaAsFET, LCD, and VCO Supplies
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
|
MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
|
| MC74HC107DR2 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
MOTOROLA INC
|
| 54LS76A/BDAJC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
|
MOTOROLA INC
|
