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				FAIRCHILD[Fairchild Semiconductor]
Part No.	74ALVC16841 74ALVC16841MTD 74ALVC16841MTDX
OCR Text	... device is byte controlled. The flip-flops appear transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE...
Description	Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
File Size	93.71K / 6 Page	View it Online	Download Datasheet

				FAIRCHILD[Fairchild Semiconductor]
Part No.	74F112PC 74F112SC 74F112SJ 74F112
OCR Text	flip-Flop April 1988 Revised July 1999 74F112 Dual JK Negative Edge-Triggered flip-Flop General Description The 74F112 contains two independent, high-speed JK flipflops with Direct Set and Clear inputs. Synchronous state changes are...
Description	Dual JK Negative Edge-Triggered flip-Flop
File Size	58.24K / 6 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	74F112 I74F112D I74F112N N74F112D N74F112N 74F112_2
OCR Text	flip-flop Product specification IC15 Data Handbook 1990 Feb 09 Philips Semiconductors Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flop 74F112 FEATURE * Industrial temperature rang...
Description	From old datasheet system Dual J-K negative edge-triggered flip-flop
File Size	84.00K / 10 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors] NXP Semiconductors N.V.
Part No.	74HC160 74HC160PW 74HC160D 74HC160DB 74HC160N 74HCT160 74HCT160D 74HCT160DB 74HCT160N 74HCT160PW 74HC160U
OCR Text	...ation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable QUICK REFERENCE ...
Description	Presettable synchronous BCD decade counter asynchronous reset CAP 2700UF 6.3V ELECT FC RADIAL HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16 74HC/HCT160; Presettable synchronous BCD decade counter; asynchronous reset
File Size	63.62K / 9 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors] NXP Semiconductors
Part No.	74HC161 74HC161N 74HC161D 74HC161DB 74HC161PW 74HCT161 74HCT161D 74HCT161DB 74HCT161N 74HCT161PW 74HC161NB
OCR Text	...ation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable 74HC/HCT161 ...
Description	Presettable synchronous 4-bit binary counter asynchronous reset Presettable synchronous 4-bit binary counter; asynchronous reset
File Size	83.50K / 12 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	74HC162 74HCT162
OCR Text	...ation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disab...
Description	Presettable synchronous BCD decade counter; synchronous reset Presettable synchronous BCD decade counter synchronous reset
File Size	78.98K / 11 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	74HC163 74HC163D 74HC163PW 74HC163DB 74HC163N 74HCT163 74HCT163D 74HCT163DB 74HCT163N 74HCT163PW 74HC163NB 74HC163U
OCR Text	...ation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disab...
Description	Presettable synchronous 4-bit binary counter; synchronous reset Presettable synchronous 4-bit binary counter synchronous reset
File Size	86.62K / 11 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	74HC7403 74HC7403D 74HC7403N 74HCT7403 74HCT7403D 74HCT7403N 7403
OCR Text	...3 position 1 (see control flip-flops) LOW on S input of flip-flops FS, FB and FP will set Q output to HIGH independent of state on R input. LOW on R input of FF1 to FF64 will set Q output to LOW independent of state on S input. 74H...
Description	4-Bit x 64-word FIFO register; 3-state
File Size	163.73K / 28 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	74HC7404 74HC7404D 74HC7404N 74HCT7404D 74HCT7404N 74HCT7404 74HCHCT7404N 74HCHCT7404D
OCR Text	...4 position 1 (See control flip-flops) LOW on S input of flip-flops FS, FB and FP will set Q output to HIGH independent of state on R input. LOW on R input of FF1 to FF64 will set Q output to LOW independent of state on S input. 74H...
Description	5-Bit x 64-word FIFO register; 3-state 5-bitx64-word FIFO register
File Size	122.23K / 28 Page	View it Online	Download Datasheet

				Philips Semiconductors
Part No.	74HC74 74HC74D 74HC74N 74HCT74 74HCT74D 74HCT74DB 74HCT74N 74HCT74PW
OCR Text	...tions 74HC/HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of September 1993 File under Integrated Circuits, IC06 1998 Feb 23 Philips Semiconductors Product specification...
Description	Dual D-type flip-flop with set and reset positive-edge trigger Dual D-type flip-flop with set and reset; positive-edge trigger
File Size	98.80K / 13 Page	View it Online	Download Datasheet

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