| |
|
 |
adi
|
| Part No. |
ADSP-21532
|
| OCR Text |
... memory mapped I/O devices. The pc133-compliant SDRAM controller can be programmed to interface to up to 128M bytes of SDRAM. The asynchronous memory controller can be programmed to control up to four banks of devices with very flexible tim... |
| Description |
Preliminary Technical Data
From old datasheet system
|
| File Size |
368.59K /
16 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
ICS
|
| Part No. |
ICS9179-06
|
| OCR Text |
pc133 SDRAMs
General Description
The ICS9179-06 generates low skew SDRAM clocks required by high-speed RISC or CISC based microprocessor systems. The ICS9179-06 is a zero delay buffer with low output-to-output skew. The buffer is compatib... |
| Description |
Clock Buffer
From old datasheet system
|
| File Size |
242.12K /
8 Page |
View
it Online |
Download Datasheet |
| |
|
|
Hynix Semiconductor Inc.
HYNIX[Hynix Semiconductor]
|
| Part No. |
GM72V66841 GM72V66841ET GM72V66841ELT-75 GM72V66841ELT-7K GM72V66841ELT-8 GM72V66841ET-7K GM72V66841EXX GM72V66841ELT-7 GM72V66841ELT-10K GM72V66841ELT-7J GM72V66841ET-7 GM72V66841ET-8 GM72V66841ET-75 GM72V66841ET-7J
|
| OCR Text |
...OP II (TOP VIEW)
Features
* pc133/PC100/PC66 Compatible -7(143MHz)/-75(133MHz)/-8(125MHz) -7K(PC100,2-2-2)/-7J(PC100,3-2-2) * 3.3V single Power supply * LVTTL interface * Max Clock frequency 143/133/125/100MHz * 4,096 refresh cycle per ... |
| Description |
2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM
From old datasheet system
IC,SDRAM,4X2MX8,CMOS,TSOP,54PIN,PLASTIC
x8 SDRAM x8 SDRAM内存
|
| File Size |
84.49K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
NXP Semiconductors N.V.
Philips
|
| Part No. |
74AVC16835A 74AVC16835A_5 74AVC16835ADGG 74AVC16835ADGV 74AVC16835ADGV112 74AVC16835ADGV118 74AVC16835A-5-15
|
| OCR Text |
...mize input overshoot and * Full pc133 solution provided when used with PCK2509S or
PCK2510S and CBT16292 undershoot Insertion
DESCRIPTION
The 74AVC16835A is a 18-bit universal bus driver. Data flow is controlled by output enable (OE), ... |
| Description |
18-bit registered driver with Dynamic Controlled OutputsE (3-State)
From old datasheet system
74AVC16835A; 18-bit registered driver with Dynamic Controlled Outputs(TM) (3-State)
BUFFER/DRIVER|SINGLE|18-BIT|AVC/ALVC-CMOS|TSSOP|56PIN|PLASTIC 缓冲驱动器|单|18位|AVC/ALVC-CMOS|TSSOP|56引脚|塑料
|
| File Size |
112.29K /
12 Page |
View
it Online |
Download Datasheet |
| |
|
|
SAMSUNG SEMICONDUCTOR CO. LTD.
Samsung Electronic
SAMSUNG[Samsung semiconductor]
|
| Part No. |
M366S2953MTS-C75 M366S2953MTS-C1L M366S2953MTS M366S3953MTS-C1H DS_M366S2953MTS DSM366S2953MTS
|
| OCR Text |
pc133/PC100 Unbuffered DIMM
128Mx64 SDRAM DIMM based on 64Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION
The Samsung M366S2953MTS is a 64M bit x 64 Synchronous Dynamic RAM high density memory module. The Sa... |
| Description |
128Mx64 SDRAM DIMM based on 64Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD Data Sheet
pc133/PC100 Unbuffered DIMM
From old datasheet system
|
| File Size |
134.26K /
9 Page |
View
it Online |
Download Datasheet |
| |
|
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| Part No. |
74AVC16836A 74AVC16836A_5 74AVC16836ADGG 74AVC16836ADGV 74AVC16836ADGV112 74AVC16836ADGV118
|
| OCR Text |
...mize input overshoot and * Full pc133 solution provided when used with PCK2509S or
PCK2510S and CBT16292 undershoot Insertion
DESCRIPTION
The 74AVC16836A is a 20-bit universal bus driver. Data flow is controlled by output enable (OE), ... |
| Description |
74AVC16836A; 20-bit registered driver with inverted register enable and Dynamic Controlled Outputs(TM) (3-State)
From old datasheet system
20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
|
| File Size |
111.94K /
11 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
